- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄368267 > PSD913F2V 200V 100kRad Hi-Rel Single N-Channel TID Hardened MOSFET in a SMD-2 package; A IRHNA7260 with Standard Packaging PDF資料下載
參數(shù)資料
| 型號： | PSD913F2V |
| 英文描述： | 200V 100kRad Hi-Rel Single N-Channel TID Hardened MOSFET in a SMD-2 package; A IRHNA7260 with Standard Packaging |
| 中文描述： | 可配置的存儲系統(tǒng)級芯片的8位微控制器 |
| 文件頁數(shù)： | 16/94頁 |
| 文件大?。?/td> | 463K |
| 代理商： | PSD913F2V |
第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁當前第16頁第17頁第18頁第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁第28頁第29頁第30頁第31頁第32頁第33頁第34頁第35頁第36頁第37頁第38頁第39頁第40頁第41頁第42頁第43頁第44頁第45頁第46頁第47頁第48頁第49頁第50頁第51頁第52頁第53頁第54頁第55頁第56頁第57頁第58頁第59頁第60頁第61頁第62頁第63頁第64頁第65頁第66頁第67頁第68頁第69頁第70頁第71頁第72頁第73頁第74頁第75頁第76頁第77頁第78頁第79頁第80頁第81頁第82頁第83頁第84頁第85頁第86頁第87頁第88頁第89頁第90頁第91頁第92頁第93頁第94頁
Preliminary
PSD913F1
15
9.0
The
PSD913F1
Functional
Blocks
As shown in Figure 1, the PSD913F1 consists of six major types of functional blocks:
J
Memory Blocks
J
PLD Blocks
J
Bus Interface
J
I/OPorts
J
Power Management Unit
J
JTAG Interface
The functions of each block are described in the following sections. Many of the blocks
perform multiple functions, and are user configurable.
9.1 Memory Blocks
The PSD913F1 has the following memory blocks:
The main Flash memory
Secondary EEPROM memory
SRAM.
The memory select signals for these blocks originate from the Decode PLD (DPLD) and
are user-defined in PSDsoft.
Table 8 summarizes the PSD913F1 memory blocks.
Device
Main Flash
EEPROM
SRAM
PSD913F1
128KB
32KB
2KB
Table 8. Memory Blocks
9.1.1 Main Flash and Secondary EEPROM
The 1 Mbit main Flash memory block is divided evenly into eight 16 Kbyte sectors. The
EEPROM memory is divided into four sectors of eight Kbytes each. Each sector of either
memory can be separately protected from program and erase operations.
Flash memory may be erased on a sector-by-sector basis and programmed byte-by-byte.
Flash sector erasure may be suspended while data is read from other sectors of memory
and then resumed after reading.
EEPROM may be programmed byte-by-byte or sector-by-sector, and erasing is automatic
and transparent. The integrity of the data can be secured with the help of Software Data
Protection (SDP). Any write operation to the EEPROM is inhibited during the first five
milliseconds following power-up.
During a program or erase of Flash, or during a write of the EEPROM, the status can be
output on the Rdy/Bsy pin of Port C3. This pin is set up using PSDsoft.
相關PDF資料 |
PDF描述 |
|---|---|
| PSD913F2(中文) | Configurable Memory System on a Chip for 8-Bit Microcontrollers(用于8位MCU的可配置存儲器系統(tǒng)) |
| PSD934F2(中文) | Configurable Memory System on a Chip for 8-Bit Microcontrollers(用于8位MCU的可配置存儲器系統(tǒng)) |
| PSD913F2 | Configurable Memory System on a Chip for 8-Bit Microcontrollers(用于8位MCU的可配置存儲器系統(tǒng)) |
| PSD934F2 | Configurable Memory System on a Chip for 8-Bit Microcontrollers(用于8位MCU的可配置存儲器系統(tǒng)) |
| PSD935G2 | Configurable Memory System on a Chip for 8-Bit Microcontrollers(8位微控制器片上存儲器可編程外設) |
相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| PSD913F2V-12B81 | 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:Flash In-System Programmable ISP Peripherals For 8-bit MCUs |
| PSD913F2V-12B81I | 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:Flash In-System Programmable ISP Peripherals For 8-bit MCUs |
| PSD913F2V-12J | 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:Flash In-System Programmable ISP Peripherals For 8-bit MCUs |
| PSD913F2V-12J1T | 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:Flash in-system programmable (ISP) peripherals for 8-bit MCUs, 3.3 V |
| PSD913F2V-12JI | 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:Flash In-System Programmable ISP Peripherals For 8-bit MCUs |
發(fā)布緊急采購，3分鐘左右您將得到回復。