<samp id="pshia"><label id="pshia"></label></samp>
    <samp id="pshia"><label id="pshia"><tt id="pshia"></tt></label></samp>
    <center id="pshia"></center>
    參數(shù)資料
    型號: PSD813F
    廠商: 意法半導(dǎo)體
    英文描述: Flash In-System-Programmable Microcontroller Peripherals(閃速,在系統(tǒng)可編程微控制器外圍器件,1M位閃速存儲(chǔ)器,256K位EEPROM,16K位SRAM)
    中文描述: Flash在系統(tǒng)可編程微控制器外圍設(shè)備(閃速,在系統(tǒng)可編程微控制器外圍器件,100萬位閃速存儲(chǔ)器,256K位的EEPROM,16K的位的SRAM)
    文件頁數(shù): 10/130頁
    文件大?。?/td> 650K
    代理商: PSD813F
    PSD813F Famly
    Prelimnary
    6
    PSD813F devices contain several major functional blocks. Figure 1 on page 3 shows the
    architecture of the PSD813F device family. The functions of each block are described
    briefly in the following sections. Many of the blocks perform multiple functions and are user
    configurable.
    5.1 Memory
    The PSD813F contains the following memories:
    A 1 Mbit Flash
    An optional secondary 256 Kbit EEPROM or Flash boot memory
    An optional 16 Kbit SRAM.
    Each of the memories is briefly discussed in the following paragraphs. A more detailed
    discussion can be found in section 9.
    The 1 Mbit Flash is the main memory of the PSD813F. It is divided into eight equally-sized
    sectors that are individually selectable.
    The optional 256 Kbit EEPROM or Flash is divided into four equally-sized sectors. Each
    sector is individually selectable.
    The optional 16 Kbit SRAM is intended for use as a scratchpad memory or as an extension
    to the microcontroller SRAM. If an external battery is connected to the PSD813F’s Vstby
    pin, data will be retained in the event of a power failure.
    Each block of memory can be located in a different address space as defined by the user.
    The access times for all memory types includes the address latching and DPLD decoding
    time.
    5.2 Page Register
    The eight-bit Page Register expands the address range of the microcontroller by up to
    256 times.The paged address can be used as part of the address space to access external
    memory and peripherals or internal memory and I/O. The Page Register can also be used
    to change the address mapping of blocks of Flash memory into different memory spaces for
    in-circuit reprogramming.
    5.3 PLDs
    The device contains two PLD blocks, each optimized for a different function, as shown in
    Table 2. The functional partitioning of the PLDs reduces power consumption, optimizes
    cost/performance, and eases design entry.
    The Decode PLD (DPLD) is used to decode addresses and generate chip selects for the
    PSD813F internal memory and registers. The CPLD can implement user-defined logic
    functions. The DPLD has combinatorial outputs. The CPLD has 16 Output Micro
    Cells
    and 3 combinatorial outputs. The PSD813F also has 24 Input Micro
    Cells that can be
    configured as inputs to the PLDs. The PLDs receive their inputs from the PLD Input Bus
    and are differentiated by their output destinations, number of Product Terms, and
    Micro
    Cells.
    The PLDs consume minimal power by using Zero-Power design techniques. The speed
    and power consumption of the PLD is controlled by the Turbo Bit (ZPSD only) in the
    PMMR0 register and other bits in the PMMR2 registers. These registers are set by the
    microcontroller at runtime. There is a slight penalty to PLD propagation time when invoking
    the ZPSD features.
    5.0
    PSD813F
    Architectural
    Overview
    Name
    Abbreviation
    Inputs
    Outputs
    Product Terms
    Decode PLD
    Complex PLD
    DPLD
    CPLD
    73
    73
    17
    19
    42
    140
    Table 2. PLDI/OTable
    相關(guān)PDF資料
    PDF描述
    PSD813FH(中文) Field Programmble Microcontroller Peripherals With Flash Memory(帶閃存的現(xiàn)場可編程微控制器)
    PSD813FN(中文) Field Programmble Microcontroller Peripherals(帶閃存的現(xiàn)場可編程微控制器)
    PSD813FN Field Programmble Microcontroller Peripherals(帶閃存的現(xiàn)場可編程微控制器)
    PSD813FH Field Programmble Microcontroller Peripherals With Flash Memory(帶閃存的現(xiàn)場可編程微控制器)
    PSD82 Three Phase Rectifier Bridges
    相關(guān)代理商/技術(shù)參數(shù)
    參數(shù)描述
    PSD813F1 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:Flash In-System Programmable ISP Peripherals For 8-bit MCUs
    PSD813F1A 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:Flash in-system programmable (ISP) peripherals for 8-bit MCUs, 5 V
    PSD813F1-A 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:Flash In-System Programmable ISP Peripherals For 8-bit MCUs
    PSD813F1A-12J 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:Flash In-System Programmable (ISP) Peripherals for 8-bit MCUs, 5V
    PSD813F1-A-12JI 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:Flash In-System Programmable ISP Peripherals For 8-bit MCUs