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參數(shù)資料
| 型號(hào)： | PIC18LF96J65-I/PT |
| 廠商： | Microchip Technology |
| 文件頁(yè)數(shù)： | 126/131頁(yè) |
| 文件大小： | 0K |
| 描述： | IC PIC MCU FLASH 48KX16 100TQFP |
| 標(biāo)準(zhǔn)包裝： | 90 |
| 系列： | PIC® 18F |
| 核心處理器： | PIC |
| 芯體尺寸： | 8-位 |
| 速度： | 41.667MHz |
| 連通性： | EBI/EMI，以太網(wǎng)，I²C，SPI，UART/USART |
| 外圍設(shè)備： | 欠壓檢測(cè)/復(fù)位，POR，PWM，WDT |
| 輸入/輸出數(shù)： | 70 |
| 程序存儲(chǔ)器容量： | 96KB（48K x 16） |
| 程序存儲(chǔ)器類型： | 閃存 |
| RAM 容量： | 3808 x 8 |
| 電壓 - 電源 (Vcc/Vdd)： | 2 V ~ 3.6 V |
| 數(shù)據(jù)轉(zhuǎn)換器： | A/D 16x10b |
| 振蕩器型： | 內(nèi)部 |
| 工作溫度： | -40°C ~ 85°C |
| 封裝/外殼： | 100-TQFP |
| 包裝： | 托盤 |
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PIC18F97J60 FAMILY
DS39762F-page 94
2011 Microchip Technology Inc.
PORTF
RF7
RF6
RF5
RF4
RF3
RF2
RF1
RF0(5)
0000 0000
PORTE
RE7(6)
RE6(6)
RE5
RE4
RE3
RE2
RE1
RE0
xxxx xxxx
PORTD
RD7(5)
RD6(5)
RD5(5)
RD4(5)
RD3(5)
RD2
RD1
RD0
xxxx xxxx
PORTC
RC7
RC6
RC5
RC4
RC3
RC2
RC1
RC0
xxxx xxxx
PORTB
RB7
RB6
RB5
RB4
RB3
RB2
RB1
RB0
xxxx xxxx
PORTA
RJPU(6)
—
RA5
RA4
RA3
RA2
RA1
RA0
0-0x 0000
SPBRGH1
EUSART1 Baud Rate Generator Register High Byte
0000 0000
BAUDCON1
ABDOVF
RCIDL
RXDTP
TXCKP
BRG16
—
WUE
ABDEN
0100 0-00
SPBRGH2
EUSART2 Baud Rate Generator Register High Byte
0000 0000
BAUDCON2
ABDOVF
RCIDL
RXDTP
TXCKP
BRG16
—
WUE
ABDEN
0100 0-00
ERDPTH
—
Buffer Read Pointer High Byte
---0 0101
ERDPTL
Buffer Read Pointer Low Byte
1111 1010
ECCP1DEL
P1RSEN
P1DC6
P1DC5
P1DC4
P1DC3
P1DC2
P1DC1
P1DC0
0000 0000
TMR4
Timer4 Register
0000 0000
PR4
Timer4 Period Register
1111 1111
T4CON
—
T4OUTPS3 T4OUTPS2 T4OUTPS1 T4OUTPS0
TMR4ON
T4CKPS1
T4CKPS0
-000 0000
CCPR4H
Capture/Compare/PWM Register 4 High Byte
xxxx xxxx
CCPR4L
Capture/Compare/PWM Register 4 Low Byte
xxxx xxxx
CCP4CON
—
DC4B1
DC4B0
CCP4M3
CCP4M2
CCP4M1
CCP4M0
--00 0000
CCPR5H
Capture/Compare/PWM Register 5 High Byte
xxxx xxxx
CCPR5L
Capture/Compare/PWM Register 5 Low Byte
xxxx xxxx
CCP5CON
—
DC5B1
DC5B0
CCP5M3
CCP5M2
CCP5M1
CCP5M0
--00 0000
SPBRG2
EUSART2 Baud Rate Generator Register Low Byte
0000 0000
RCREG2
EUSART2 Receive Register
0000 0000
TXREG2
EUSART2 Transmit Register
0000 0000
TXSTA2
CSRC
TX9
TXEN
SYNC
SENDB
BRGH
TRMT
TX9D
0000 0010
RCSTA2
SPEN
RX9
SREN
CREN
ADDEN
FERR
OERR
RX9D
0000 000x
ECCP3AS
ECCP3ASE ECCP3AS2 ECCP3AS1 ECCP3AS0
PSS3AC1
PSS3AC0
PSS3BD1
PSS3BD0
0000 0000
ECCP3DEL
P3RSEN
P3DC6
P3DC5
P3DC4
P3DC3
P3DC2
P3DC1
P3DC0
0000 0000
ECCP2AS
ECCP2ASE ECCP2AS2 ECCP2AS1 ECCP2AS0
PSS2AC1
PSS2AC0
PSS2BD1
PSS2BD0
0000 0000
ECCP2DEL
P2RSEN
P2DC6
P2DC5
P2DC4
P2DC3
P2DC2
P2DC1
P2DC0
0000 0000
SSP2BUF
MSSP2 Receive Buffer/Transmit Register
xxxx xxxx
SSP2ADD
MSSP2 Address Register (I2C Slave mode), MSSP2 Baud Rate Reload Register (I2C Master mode)
0000 0000
SSP2STAT
SMP
CKE
D/A
PS
R/W
UA
BF
0000 0000
SSP2CON1
WCOL
SSPOV
SSPEN
CKP
SSPM3
SSPM2
SSPM1
SSPM0
0000 0000
SSP2CON2
GCEN
ACKSTAT
ACKDT
ACKEN
RCEN
PEN
RSEN
SEN
0000 0000
GCEN
ACKSTAT
ADMSK5(4)
ADMSK4(4)
ADMSK3(4)
ADMSK2(4)
ADMSK1(4)
SEN
EDATA
Ethernet Transmit/Receive Buffer Register (EDATA<7:0>)
xxxx xxxx
EIR
—
PKTIF
DMAIF
LINKIF
TXIF
—
TXERIF
RXERIF
-000 0-00
ECON2
AUTOINC
PKTDEC
ETHEN
—
100- ----
TABLE 6-5:
REGISTER FILE SUMMARY (PIC18F97J60 FAMILY) (CONTINUED)
File Name
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Values on
POR, BOR
Details on
Page:
Legend: x
= unknown; u = unchanged; - = unimplemented, read as ‘0’; q = value depends on condition; r = reserved bit, do not modify. Shaded cells
are unimplemented, read as ‘0’.
Note 1:
Bit 7 and bit 6 are cleared by user software or by a POR.
2:
Bit 21 of the PC is only available in Serial Programming modes.
3:
Reset value is ‘0’ when Two-Speed Start-up is enabled and ‘1’ if disabled.
4:
Alternate names and definitions for these bits when the MSSP module is operating in I2C Slave mode.
5:
These bits and/or registers are only available in 100-pin devices; otherwise, they are unimplemented and read as ‘0’. Reset values shown
apply only to 100-pin devices.
6:
These bits and/or registers are only available in 80-pin and 100-pin devices. In 64-pin devices, they are unimplemented and read as ‘0’. Reset
values are shown for 100-pin devices.
7:
In Microcontroller mode, the bits in this register are unwritable and read as ‘0’.
8:
PLLEN is only available when either ECPLL or HSPLL Oscillator mode is selected; otherwise, read as ‘0’.
9:
Implemented in 100-pin devices in Microcontroller mode only.
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