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參數(shù)資料
| 型號： | PIC12F506 |
| 廠商： | Microchip Technology Inc. |
| 英文描述： | 8/14-Pin, 8-Bit Flash Microcontroller |
| 中文描述： | 8/14-Pin，8位閃存微控制器 |
| 文件頁數(shù)： | 76/116頁 |
| 文件大小： | 907K |
| 代理商： | PIC12F506 |
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PIC12F510/16F506
DS41268C-page 74
Preliminary
2007 Microchip Technology Inc.
BTFSS
Bit Test f, Skip if Set
Syntax:
Operands:
[
label
] BTFSS f,b
0
≤
f
≤
31
0
≤
b < 7
skip if (f<b>) =
1
None
If bit ‘b’ in register ‘f’ is ‘
1
’, then the
next instruction is skipped.
If bit ‘b’ is ‘
1
’, then the next instruc-
tion fetched during the current
instruction execution, is discarded
and a
NOP
is executed instead,
making this a two-cycle instruction.
Operation:
Status Affected:
Description:
CALL
Subroutine Call
Syntax:
Operands:
Operation:
[
label
] CALL k
0
≤
k
≤
255
(PC) + 1
→
Top-of-Stack;
k
→
PC<7:0>;
(STATUS <6:5>)
→
PC<10:9>;
0
→
PC<8>
None
Subroutine call. First, return
address (PC + 1) is PUSHed onto
the stack. The eight-bit immediate
address is loaded into PC
bits <7:0>. The upper bits
PC<10:9> are loaded from
STATUS <6:5>, PC<8> is cleared.
CALL
is a two-cycle instruction.
Status Affected:
Description:
CLRF
Clear f
Syntax:
Operands:
Operation:
[
label
] CLRF f
0
≤
f
≤
31
00h
→
(f);
1
→
Z
Z
The contents of register ‘f’ are
cleared and the Z bit is set.
Status Affected:
Description:
CLRW
Clear W
Syntax:
Operands:
Operation:
[
label
] CLRW
None
00h
→
(W);
1
→
Z
Z
The W register is cleared. Zero bit
(Z) is set.
Status Affected:
Description:
CLRWDT
Clear Watchdog Timer
Syntax:
Operands:
Operation:
[
label
] CLRWDT
None
00h
→
WDT;
0
→
WDT prescaler (if assigned);
1
→
TO;
1
→
PD
TO, PD
The
CLRWDT
instruction resets the
WDT. It also resets the prescaler,
if the prescaler is assigned to the
WDT and not Timer0. Status bits
TO and PD are set.
Status Affected:
Description:
COMF
Complement f
Syntax:
Operands:
[
label
] COMF f,d
0
≤
f
≤
31
d
∈
[0,1]
(f)
→
(dest)
Z
The contents of register ‘f’ are
complemented. If ‘d’ is ‘
0
’, the
result is stored in the W register. If
‘d’ is ‘
1
’, the result is stored back in
register ‘f’.
Operation:
Status Affected:
Description:
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