參數(shù)資料
型號(hào)： PIC12F506
廠商： Microchip Technology Inc.
英文描述： 8/14-Pin, 8-Bit Flash Microcontroller
中文描述： 8/14-Pin，8位閃存微控制器
文件頁(yè)數(shù)： 53/116頁(yè)
文件大?。?/td> 907K
代理商： PIC12F506
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2007 Microchip Technology Inc.
Preliminary
DS41268C-page 51
PIC12F510/16F506
9.0
ANALOG-TO-DIGITAL (A/D)
CONVERTER
The A/D Converter allows conversion of an analog
signal into an 8-bit digital signal.
9.1
Clock Divisors
The ADC has 4 clock source settings ADCS<1:0>.
There are 3 divisor values 16, 8 and 4. The fourth set-
ting is INTOSC with a divisor of 4. These settings will
allow a proper conversion when using an external
oscillator at speeds from 20 MHz to 350 kHz. Using an
external oscillator at a frequency below 350 kHz
requires the ADC oscillator setting to be INTOSC/4 for
valid ADC results.
The ADC requires 13 T
AD
periods to complete a
conversion. The divisor values do not affect the number
of T
AD
periods required to perform a conversion. The
divisor values determine the length of the T
AD
period.
When the ADCS<1:0> bits are changed while an ADC
conversion is in process, the new ADC clock source will
not be selected until the next conversion is started. This
clock source selection will be lost when the device
enters Sleep.
9.1.1
There is no external voltage reference for the ADC. The
ADC reference voltage will always be V
DD
.
VOLTAGE REFERENCE
9.1.2
ANALOG MODE SELECTION
The ANS<1:0> bits are used to configure pins for
analog input. Upon any Reset, ANS<1:0> defaults to
11. This configures pins AN0, AN1 and AN2 as analog
inputs. The comparator output, C1OUT, will override
AN2 as an input if the comparator output is enabled.
Pins configured as analog inputs are not available for
digital output. Users should not change the ANS bits
while a conversion is in process. ANS bits are active
regardless of the condition of ADON.
9.1.3
The CHS bits are used to select the analog channel to
be sampled by the ADC. The CHS<1:0> bits can be
changed at any time without adversely effecting a con-
version. To acquire an analog signal the CHS<1:0>
selection must match one of the pin(s) selected by the
ANS<1:0> bits. When the ADC is on (ADON =
1
) and a
channel is selected that is also being used by the
comparator, then both the comparator and the ADC will
see the analog voltage on the pin.
ADC CHANNEL SELECTION
When the CHS<1:0> bits are changed during an ADC
conversion, the new channel will not be selected until
the current conversion is completed. This allows the
current conversion to complete with valid results. All
channel selection information will be lost when the
device enters Sleep.
TABLE 9-1:
CHANNEL SELECT (ADCS)
BITS AFTER AN EVENT
9.1.4
The GO/DONE bit is used to determine the status of a
conversion, to start a conversion and to manually halt a
conversion in process. Setting the GO/DONE bit starts
a conversion. When the conversion is complete, the
ADC module clears the GO/DONE bit. A conversion
can be terminated by manually clearing the GO/DONE
bit while a conversion is in process. Manual termination
of a conversion may result in a partially converted
result in ADRES.
The GO/DONE bit is cleared when the device enters
Sleep, stopping the current conversion. The ADC does
not have a dedicated oscillator, it runs off of the instruc-
tion clock. Therefore, no conversion can occur in sleep.
The GO/DONE bit cannot be set when ADON is clear.
THE GO/DONE BIT
Note:
It is the users responsibility to ensure that
use of the ADC and comparator simulta-
neously on the same pin, does not
adversely
affect
monitored or adversely effect device
operation.
the
signal
being
Event
ADCS<1:0>
MCLR
Conversion completed
Conversion terminated
Power-on
Wake from Sleep
11
CS<1:0>
CS<1:0>
11
11
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