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參數(shù)資料
| 型號(hào)： | PIC12F506 |
| 廠商： | Microchip Technology Inc. |
| 英文描述： | 8/14-Pin, 8-Bit Flash Microcontroller |
| 中文描述： | 8/14-Pin，8位閃存微控制器 |
| 文件頁數(shù)： | 21/116頁 |
| 文件大?。?/td> | 907K |
| 代理商： | PIC12F506 |
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2007 Microchip Technology Inc.
Preliminary
DS41268C-page 19
PIC12F510/16F506
REGISTER 4-2:
STATUS: STATUS REGISTER (PIC16F506)
R/W-0
RBWUF
bit 7
R/W-0
CWUF
R/W-0
PA0
R-1
TO
R-1
PD
R/W-x
Z
R/W-x
DC
R/W-x
C
bit 0
Legend:
R = Readable bit
-n = Value at POR
W = Writable bit
‘1’ = Bit is set
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
x = Bit is unknown
bit 7
RBWUF
: PORTB Reset bit
1
= Reset due to wake-up from Sleep on pin change
0
= After power-up or other Reset
CWUF
:
Comparator Reset bit
1
= Reset due to wake-up from Sleep on comparator change
0
= After power-up or other Reset
PA0
: Program Page Preselect bit
1
= Page 1 (200h-3FFh)
0
= Page 0 (000h-1FFh)
Each page is 512 bytes.
Using the PA0 bit as a general purpose read/write bit in devices which do not use it for program page preselect is
not recommended, since this may affect upward compatibility with future products.
TO
: Time-out bit
1
= After power-up,
CLRWDT
instruction, or
SLEEP
instruction
0
= A WDT time-out occurred
PD
: Power-down bit
1
= After power-up or by the
CLRWDT
instruction
0
= By execution of the
SLEEP
instruction
Z
: Zero bit
1
= The result of an arithmetic or logic operation is zero
0
= The result of an arithmetic or logic operation is not zero
DC
: Digit carry/borrow bit (for
ADDWF
and
SUBWF
instructions)
ADDWF:
1
= A carry from the 4th low-order bit of the result occurred
0
= A carry from the 4th low-order bit of the result did not occur
SUBWF:
1
= A borrow from the 4th low-order bit of the result did not occur
0
= A borrow from the 4th low-order bit of the result occurred
C
: Carry/borrow bit (for
ADDWF
,
SUBWF
and
RRF
,
RLF
instructions)
ADDWF:
SUBWF:
1
= A carry occurred
1
= A borrow did not occur
0
= A carry did not occur
0
= A borrow occurred
bit 6
bit 5
bit 4
bit 3
bit 2
bit 1
bit 0
RRF
or
RLF:
Load bit with LSb or MSb, respectively
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