參數(shù)資料
型號: PI7C7100
廠商: Pericom Semiconductor Corp.
英文描述: 3-Port PCI Bridge
中文描述: 3端口PCI橋
文件頁數(shù): 81/132頁
文件大?。?/td> 2559K
代理商: PI7C7100
73
09/18/00 Rev 1.1
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PI7C7100
ADVANCE INFORMATION
The instruction determines the test to be performed, the test data register to be accessed, or both. The IR is two bits wide.
When the IR is selected, the most significant bit is connected to TDI, and the least significant bit is connected to TDO.
The value presented on the TDI pin is shifted into the IR on each rising edge of TCK. The TAP controller captures fixed
parallel data (01 binary ). When a new instruction is shifted in through TDI, the value 01 (binary) is always shifted out through
TDO, least significant bit first. This helps identify instructions in a long chain of serial data from several devices.
Upon activation of the TRST# reset pin, the latched instruction asynchronously changes to the idcode instruction. When
the TAP controller moves into the test state other than by reset activation, the opcode changes as TDI shifts, and becomes
active on the falling edge of TCK.
15.2 Boundary-Scan Instruction Set
The PI7C7100 supports three mandatory boundary-scan instructions (bypass, sample/preload and extest). The table
shown below lists the PI7C7100’s boundary-scan instruction codes. The “reserved” code should not be used.
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Table 15-1. TAP Pins
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