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參數(shù)資料
| 型號： | PHN110 |
| 廠商： | NXP SEMICONDUCTORS |
| 元件分類： | JFETs |
| 英文描述： | N-channel enhancement mode MOS transistor |
| 中文描述： | 4 A, 30 V, 0.1 ohm, N-CHANNEL, Si, POWER, MOSFET, MS-012AA |
| 封裝： | PLASTIC, SO-8 |
| 文件頁數(shù)： | 5/12頁 |
| 文件大?。?/td> | 79K |
| 代理商： | PHN110 |
1997 Jun 17
5
Philips Semiconductors
Product specification
N-channel enhancement mode
MOS transistor
PHN110
CHARACTERISTICS
T
j
= 25
°
C unless otherwise specified.
SYMBOL
PARAMETER
CONDITIONS
MIN.
TYP.
0.11
0.08
250
140
50
10
1
2.5
MAX.
2.8
100
±
100
0.2
0.1
30
UNIT
V
(BR)DSS
V
GSth
I
DSS
I
GSS
R
DSon
drain-source breakdown voltage
gate-source threshold voltage
drain-source leakage current
gate leakage current
drain-source on-state resistance
V
GS
= 0; I
D
= 10
μ
A
V
GS
= V
DS
; I
D
= 1 mA
V
GS
= 0; V
DS
= 24 V
V
GS
=
±
20 V; V
DS
= 0
V
GS
= 4.5 V; I
D
= 1 A
V
GS
= 10 V; I
D
= 2 A
V
GS
= 0; V
DS
= 24 V; f = 1 MHz
V
GS
= 0; V
DS
= 24 V; f = 1 MHz
V
GS
= 0; V
DS
= 24 V; f = 1 MHz
V
GS
= 10 V; V
DD
= 15 V; I
D
= 2 A
V
GS
= 10 V; V
DD
= 15 V; I
D
= 2 A
V
GS
= 10 V; V
DD
= 15 V; I
D
= 2 A
30
1
V
V
nA
nA
pF
pF
pF
nC
nC
nC
C
iss
C
oss
C
rss
Q
g
Q
gs
Q
gd
input capacitance
output capacitance
reverse transfer capacitance
total gate charge
gate-source charge
gate-drain charge
Switching times
(see Fig.11)
t
d(on)
t
f
t
on
t
d(off)
t
r
t
off
turn-on delay time
fall time
turn-on switching time
turn-off delay time
rise time
turn-off switching time
V
GS
= 0 to 10 V; V
DD
= 15 V;
I
D
= 1 A; R
L
= 15
; R
gen
= 6
4.5
3.5
8
15
10
25
16
50
ns
ns
ns
ns
ns
ns
V
GS
= 10 to 0 V; V
DD
= 15 V;
I
D
= 1 A; R
L
= 15
; R
gen
= 6
Source-drain diode
V
SD
t
rr
source-drain diode forward voltage
reverse recovery time
V
GD
= 0; I
S
= 1.25 A
I
S
= 1.25 A; di/dt =
100 A/
μ
s
35
1.2
100
V
ns
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