參數(shù)資料
型號： PHB11N06LT
廠商： NXP SEMICONDUCTORS
元件分類： JFETs
英文描述： TrenchMOS transistor Logic level FET
中文描述： 10.3 A, 55 V, 0.15 ohm, N-CHANNEL, Si, POWER, MOSFET
封裝： PLASTIC, D2PAK-3
文件頁數(shù)： 2/9頁
文件大小： 76K
代理商： PHB11N06LT
Philips Semiconductors
Product specification
TrenchMOS
transistor
Logic level FET
PHB11N06LT, PHD11N06LT
ESD LIMITING VALUE
SYMBOL PARAMETER
V
C
Electrostatic discharge
capacitor voltage, all pins
CONDITIONS
Human body model (100 pF, 1.5 k
)
MIN.
-
MAX.
2
UNIT
kV
THERMAL RESISTANCES
SYMBOL PARAMETER
R
th j-mb
Thermal resistance junction
to mounting base
R
th j-a
Thermal resistance junction
to ambient
CONDITIONS
TYP.
-
MAX.
4.17
UNIT
K/W
SOT78 package, in free air
SOT428 and SOT404 package, pcb
mounted, minimum footprint
60
50
-
-
K/W
K/W
ELECTRICAL CHARACTERISTICS
T
j
= 25C unless otherwise specified
SYMBOL PARAMETER
V
(BR)DSS
Drain-source breakdown
voltage
V
(BR)GSS
Gate-source breakdown
voltage
V
GS(TO)
Gate threshold voltage
CONDITIONS
V
GS
= 0 V; I
D
= 0.25 mA;
MIN.
55
50
10
TYP. MAX. UNIT
-
-
-
-
-
-
V
V
V
T
j
= -55C
I
G
=
±
1 mA;
V
DS
= V
GS
; I
D
= 1 mA
1.0
0.5
-
-
-
-
4
-
-
-
-
-
-
-
1.5
-
-
100
120
250
10
0.02
-
0.05
-
6.1
1.3
3.2
2.0
-
2.3
130
150
315
-
1
20
10
500
-
-
-
V
V
V
T
j
= 175C
T
j
= -55C
R
DS(ON)
Drain-source on-state
resistance
V
GS
= 10 V; I
= 5.5 A
V
GS
= 5 V; I
D
= 5.5 A
m
m
m
S
μ
A
μ
A
μ
A
μ
A
nC
nC
nC
T
j
= 175C
g
fs
I
GSS
Forward transconductance
Gate source leakage current V
GS
=
±
5 V; V
DS
= 0 V
V
DS
= 25 V; I
D
= 5.5 A
T
j
= 175C
I
DSS
Zero gate voltage drain
current
Total gate charge
Gate-source charge
Gate-drain (Miller) charge
V
DS
= 55 V; V
GS
= 0 V;
T
j
= 175C
Q
g(tot)
Q
gs
Q
gd
t
d on
t
r
t
d off
t
f
L
d
L
s
I
D
= 11 A; V
DD
= 44 V; V
GS
= 5 V
Turn-on delay time
Turn-on rise time
Turn-off delay time
Turn-off fall time
Internal drain inductance
Internal source inductance
V
DD
= 30 V; I
D
= 5 A;
V
= 5 V; R
= 10
Resistive load
-
-
-
-
-
-
6
16
35
30
30
-
-
ns
ns
ns
ns
nH
nH
23
18
18
3.5
7.5
Measured from tab to centre of die
Measured from source lead to source
bond pad
V
GS
= 0 V; V
DS
= 25 V; f = 1 MHz
C
iss
C
oss
C
rss
Input capacitance
Output capacitance
Feedback capacitance
-
-
-
250
34
35
330
50
50
pF
pF
pF
September 1998
2
Rev 1.000
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