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參數(shù)資料
| 型號： | PCM3006 |
| 元件分類： | Codec |
| 英文描述： | 16-Bit, Single-Ended Analog Input/Output STEREO AUDIO CODEC |
| 中文描述： | 16位，單端模擬輸入/輸出立體聲音頻編解碼 |
| 文件頁數(shù)： | 16/16頁 |
| 文件大?。?/td> | 227K |
| 代理商： | PCM3006 |
16
PCM3006
5-LEVEL
Σ
MODULATOR
Frequency (kHz)
G
0
–10
–20
–30
–40
–50
–60
–70
–80
–90
–100
–110
–120
–130
–140
–150
0
5
10
15
20
25
30
An internal reference circuit with three external capacitors
provides all reference voltages which are required by the
ADC, which defines the full-scale range for the converter.
The internal single-to-differential voltage converter saves
the design, space and extra parts needed for external cir-
cuitry required by many delta-sigma converters. The internal
full-differential signal processing architecture provides a
wide dynamic range and excellent power supply rejection
performance. The input signal is sampled at 64X
oversampling rate, eliminating the need for a sample-and-
hold circuit, and simplifying anti-alias filtering require-
ments. The 5-level delta-sigma noise shaper consists of five
integrators which use a switched-capacitor topology, a com-
parator and a feedback loop consisting of a one-bit DAC.
The delta-sigma modulator shapes the quantization noise,
shifting it out of the audio band in the frequency domain.
The high order of the modulator enables it to randomize the
modulator outputs, reducing idle tone levels.
The 64f
S
one-bit data stream from the modulator is converted
to 1f
S
16-bit data words by the decimation filter, which also
acts as a low pass filter to remove the shaped quantization
noise. The DC components are removed by a high pass filter
function contained within the decimation filter.
THEORY OF OPERATION
DAC SECTION
The delta-sigma DAC section of PCM3006 is based on a 5-
level amplitude quantizer and a 3rd-order noise shaper. This
section converts the oversampled input data to 5-level delta-
sigma format. A block diagram of the 5-level delta-sigma
modulator is shown in Figure 11. This 5-level delta-sigma
modulator has the advantage of stability and clock jitter
sensitivity over the typical one-bit (2 level) delta-sigma
modulator. The combined oversampling rate of the delta-
sigma modulator and the internal 8X interpolation filter is
64f
S
for a 256f
S
system clock. The theoretical quantization
noise performance of the 5-level delta-sigma modulator is
shown in Figure 12.
FIGURE 11. 5-Level
Σ
Modulator Block Diagram.
FIGURE 12. Quantization Noise Spectrum.
Out
64f
S
(256f
S
)
In
8f
16-Bit
+
+
+
4
3
2
1
0
5-level Quantizer
+
–
+
Z
–1
+
–
+
Z
–1
+
+
Z
–1
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| PCM3006T | 功能描述:接口—CODEC 16-Bit Sngl-end Anlg I/O Ster Codec RoHS:否 制造商:Texas Instruments 類型: 分辨率: 轉(zhuǎn)換速率:48 kSPs 接口類型:I2C ADC 數(shù)量:2 DAC 數(shù)量:4 工作電源電壓:1.8 V, 2.1 V, 2.3 V to 5.5 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:DSBGA-81 封裝:Reel |
| PCM3006T/2K | 功能描述:接口—CODEC 16-Bit Sngl-end Anlg I/O Ster Codec RoHS:否 制造商:Texas Instruments 類型: 分辨率: 轉(zhuǎn)換速率:48 kSPs 接口類型:I2C ADC 數(shù)量:2 DAC 數(shù)量:4 工作電源電壓:1.8 V, 2.1 V, 2.3 V to 5.5 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:DSBGA-81 封裝:Reel |
| PCM3006T/2KG6 | 功能描述:接口—CODEC 16-Bit Sngl-end Anlg I/O Ster Codec RoHS:否 制造商:Texas Instruments 類型: 分辨率: 轉(zhuǎn)換速率:48 kSPs 接口類型:I2C ADC 數(shù)量:2 DAC 數(shù)量:4 工作電源電壓:1.8 V, 2.1 V, 2.3 V to 5.5 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:DSBGA-81 封裝:Reel |
| PCM3006TG | 制造商:Rochester Electronics LLC 功能描述:- Bulk |
| PCM3006TG6 | 功能描述:接口—CODEC 16-Bit Sngl-end Anlg I/O Ster Codec RoHS:否 制造商:Texas Instruments 類型: 分辨率: 轉(zhuǎn)換速率:48 kSPs 接口類型:I2C ADC 數(shù)量:2 DAC 數(shù)量:4 工作電源電壓:1.8 V, 2.1 V, 2.3 V to 5.5 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:DSBGA-81 封裝:Reel |
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