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參數(shù)資料
| 型號： | PCM3006 |
| 元件分類： | Codec |
| 英文描述： | 16-Bit, Single-Ended Analog Input/Output STEREO AUDIO CODEC |
| 中文描述： | 16位，單端模擬輸入/輸出立體聲音頻編解碼 |
| 文件頁數(shù)： | 11/16頁 |
| 文件大?。?/td> | 227K |
| 代理商： | PCM3006 |
11
PCM3006
PCM AUDIO INTERFACE
The four-wire digital audio interface for PCM3006 is com-
prised of: LRCIN (pin 10), BCKIN (pin 11), DIN (pin 15),
and DOUT (pin 12). PCM3006 accepts 16-bit Most Signifi-
cant Bit (MSB) First. Figures 2 and 3 illustrate audio data
input/output format and timing.
PCM3006 can accept 32-, 48-, or 64-bit clocks (BCKIN) in
one clock of LRCIN.
MSB
L–ch
R–ch
L–ch
R–ch
LSB
LRCIN
BCKIN
FORMAT 0: PCM3006
DIN
MSB
LSB
DAC: 16-Bit, MSB-First, Right-Justified
ADC: 16-Bit, MSB-First, Left-Justified
1
16
2
3
14 15 16
1
2
3
14 15 16
MSB
LSB
LRCIN
BCKIN
DOUT
MSB
LSB
1
2
3
14 15 16
1
2
3
14 15 16
1
FIGURE 2. Audio Data Input/Output Format.
t
BCH
t
BCY
t
BCL
t
LB
t
DIH
t
DIS
t
LRP
t
BL
t
LDO
t
BDO
BCKIN
LRCIN
DIN
DOUT
0.5V
DD
0.5V
DD
0.5V
DD
0.5V
DD
BCKIN Pulse Cycle Time
BCKIN Pulse Width High
BCKIN Pulse Width Low
BCKIN Rising Edge to LRCIN Edge
LRCIN Edge to BCKIN Rising Edge
LRCIN Pulse Width
DIN Set-up Time
DIN Hold Time
DOUT Delay Time to BCKIN Falling Edge
DOUT Delay Time to LRCIN Edge
Rising Time of All Signals
Falling Time of All Signals
t
BCY
t
BCH
t
BCL
t
BL
t
LB
t
LRP
t
DIS
t
DIH
t
BDO
t
LDO
t
RISE
t
FALL
300ns (min)
120ns (min)
120ns (min)
40ns (min)
40ns (min)
t
BCY
(min)
40ns (min)
40ns (min)
40ns (max)
40ns (max)
20ns (max)
20ns (max)
FIGURE 3. Audio Data Input/Output Timing.
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