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參數(shù)資料
| 型號(hào)： | PCM3006 |
| 元件分類： | Codec |
| 英文描述： | 16-Bit, Single-Ended Analog Input/Output STEREO AUDIO CODEC |
| 中文描述： | 16位，單端模擬輸入/輸出立體聲音頻編解碼 |
| 文件頁數(shù)： | 14/16頁 |
| 文件大?。?/td> | 227K |
| 代理商： | PCM3006 |
14
PCM3006
GROUNDING
In order to optimize the dynamic performance of PCM3006,
the analog and digital grounds are not connected internally.
The PCM3006 performance is optimized with a single
ground plane for all returns. It is recommended to tie all
PCM3006 ground pins with low impedance connections to
the analog ground plane. PCM3006 should reside entirely
over this plane to avoid coupling high frequency digital
switching noise into the analog ground plane.
VOLTAGE INPUT PINS
A tantalum capacitor, between 1
μ
F and 10
μ
F, is recom-
mended as an AC-coupling capacitor at the inputs. Combined
with the 30k
characteristic input impedance, a 1.0
μ
F cou-
pling capacitor will establish a 5.3Hz cut-off frequency for
blocking DC. The input voltage range can be increased by
adding a series resistor on the analog input line. This series
resistor, when combined with the 30k
input impedance,
creates a voltage divider and enables larger input ranges.
V
REF
Pins
A 4.7
μ
F to 10
μ
F tantalum capacitor is recommended be-
tween V
REF
1, V
REF
2, and AGND to ensure low source
impedance for the ADC’s references. These capacitors should
be located as close as possible to the reference pins to reduce
dynamic errors on the ADC reference.
V
COM
Pin
A 4.7
μ
F to 10
μ
F tantalum capacitor is recommended be-
tween V
COM
and AGND to insure low source impedance of
the ADC and DAC common voltage. This capacitor should
be located as close as possible to the V
COM
pin to reduce
dynamic errors on the DAC common.
SYSTEM CLOCK
The quality of the system clock can influence dynamic
performance of both the ADC and DAC in the PCM3006.
The duty cycle and jitter at the system clock input pin must
be carefully managed. When power is supplied to the part,
the system clock, bit clock (BCKIN) and a word clock
(LCRIN) should also be supplied simultaneously. Failure to
supply the audio clocks will result in a power dissipation
increase of up to three times normal dissipation and may
degrade long term reliability if the maximum power dissipa-
tion limit is exceeded.
RST CONTROL
If the capacitance between V
REF
and V
COM
exceeds 2.2
μ
F,
an external reset control delay time circuit must be used.
OPERATIONAL CONTROL
PCM3006 has hardwire functional control using PDAD (pin
7) and PDDA (pin 8) for Power-Down Control and DEM0
(pin 18) and DEM1 (pin 17) for de-emphasis.
PDAD:
ADC Power-Down Control (Pin 7)
This pin places the ADC section in the lowest
power consumption mode. The ADC operation is
stopped by cutting the supply current to the ADC
section, and DOUT is fixed to zero during ADC
Power-Down Mode enable. Figure 7 illustrates
the ADC DOUT response for ADC power-down
ON/OFF. This does not affect the DAC operation.
PDAD
POWER-DOWN
Low
High
ADC Power-Down Mode Enabled
ADC Power-Down Mode Disabled
PDDA:
DAC Power-Down Control (Pin 8)
This pin places the DAC section in the lowest
power consumption mode. The DAC operation is
stopped by cutting the supply current to the DAC
section and V
OUT
is fixed to GND during DAC
Power-Down Mode enable. Figure 8 illustrates the
DAC V
OUT
response for DAC Power-Down ON/
OFF. This does not affect the ADC operation.
PDDA
POWER-DOWN
Low
High
DAC Power-Down Mode Enabled
DAC Power-Down Mode Disable
DEM1, 0:
DAC De-emphasis Control (Pin 17 and Pin 18)
These pins select the de-emphasis mode as shown
below:
DEM1
DEM0
Low
Low
High
High
Low
High
Low
High
De-emphasis 44.1kHz ON
De-emphasis OFF
De-emphasis 48kHz ON
De-emphasis 32kHz ON
APPLICATION AND LAYOUT
CONSIDERATIONS
POWER SUPPLY BYPASSING
The digital and analog power supply lines to PCM3006
should be bypassed to the corresponding ground pins with
both 0.1
μ
F ceramic and 10
μ
F tantalum capacitors as close
to the device pins as possible. Although PCM3006 has three
power supply lines to optimize dynamic performance, the
use of one common power supply is generally recom-
mended to avoid unexpected latch-up or pop noise due to
power supply sequencing problems. If separate power sup-
plies are used, back-to-back diodes are recommended to
avoid latch-up problems.
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