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參數(shù)資料
| 型號： | PCF8563 |
| 廠商： | NXP Semiconductors N.V. |
| 英文描述： | Real-time clock/calendar(實時時鐘/日歷) |
| 中文描述： | 實時時鐘/日歷（實時時鐘/日歷） |
| 文件頁數(shù)： | 14/30頁 |
| 文件大小： | 676K |
| 代理商： | PCF8563 |
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Philips Semiconductors
PCF8563
Real-time clock/calendar
Product specification
16 April 1999
14 of 30
9397 750 04855
Philips Electronics N.V. 1999. All rights reserved.
8.9.3
Bit transfer
One data bit is transferred during each clock pulse. The data on the SDA line must
remain stable during the HIGH period of the clock pulse as changes in the data line at
this time will be interpreted as a control signal; see
Figure 8
.
8.9.4
Acknowledge
The number of data bytes transferred between the START and STOP conditions from
transmitter to receiver is unlimited. Each byte of eight bits is followed by an
acknowledge bit. The acknowledge bit is a HIGH level signal put on the bus by the
transmitter during which time the master generates an extra acknowledge related
clock pulse.
A slave receiver which is addressed must generate an acknowledge after the
reception of each byte. Also a master receiver must generate an acknowledge after
the reception of each byte that has been clocked out of the slave transmitter.
The device that acknowledges must pull down the SDA line during the acknowledge
clock pulse, so that the SDA line is stable LOW during the HIGH period of the
acknowledge related clock pulse (set-up and hold times must be taken into
consideration).
A master receiver must signal an end of data to the transmitter by not generating an
acknowledge on the last byte that has been clocked out of the slave. In this event the
transmitter must leave the data line HIGH to enable the master to generate a STOP
condition.
Fig 8.
Bit transfer on the I
2
C-bus.
dth
MBC621
data line
stable;
data valid
change
of data
allowed
SDA
SCL
Fig 9.
Acknowledge on the I
2
C-bus.
width
MBC602
S
START
condition
9
8
2
1
clock pulse for
acknowledgement
not acknowledge
acknowledge
DATA OUTPUT
BY TRANSMITTER
DATA OUTPUT
BY RECEIVER
SCL FROM
MASTER
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| PCF8566 | Universal LCD driver for low multiplex rates |
| PCF8573 | Clock/calendar with Power Fail Detector |
| PCF8573P | Clock/calendar with Power Fail Detector |
| PCF8573T | Clock/calendar with Power Fail Detector |
| PCF8574 | Remote 8-bit I/O expander for I2C-bus |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| PCF8563_11 | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:Real-time clock/calendar |
| PCF8563BS | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:Real-time clock/calendar |
| PCF8563BS/4 | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:Real-time clock/calendar |
| PCF8563BS/4,118 | 功能描述:實時時鐘 ULTRA LOW POWER RoHS:否 制造商:Microchip Technology 功能:Clock, Calendar. Alarm RTC 總線接口:I2C 日期格式:DW:DM:M:Y 時間格式:HH:MM:SS RTC 存儲容量:64 B 電源電壓-最大:5.5 V 電源電壓-最小:1.8 V 最大工作溫度:+ 85 C 最小工作溫度: 安裝風(fēng)格:Through Hole 封裝 / 箱體:PDIP-8 封裝:Tube |
| PCF8563BS/4-T | 功能描述:實時時鐘 ULTRA LOW POWER CLOCK CALENDAR RoHS:否 制造商:Microchip Technology 功能:Clock, Calendar. Alarm RTC 總線接口:I2C 日期格式:DW:DM:M:Y 時間格式:HH:MM:SS RTC 存儲容量:64 B 電源電壓-最大:5.5 V 電源電壓-最小:1.8 V 最大工作溫度:+ 85 C 最小工作溫度: 安裝風(fēng)格:Through Hole 封裝 / 箱體:PDIP-8 封裝:Tube |
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