參數(shù)資料
型號: PCF85103C-2
廠商: NXP Semiconductors N.V.
元件分類: DRAM
英文描述: 256 x 8-bit CMOS EEPROM with I2C-bus interface
中文描述: 256 × 8位CMOS EEPROM,帶有I2C總線接口
文件頁數(shù): 4/20頁
文件大?。?/td> 346K
代理商: PCF85103C-2
Philips Semiconductors
PCF85103C-2
256
×
8-bit CMOS EEPROM with I
2
C-bus interface
Product data
Rev. 02 — 09 May 2002
4 of 20
9397 750 09646
Koninklijke Philips Electronics N.V. 2002. All rights reserved.
6.
Pinning information
6.1 Pinning
6.2 Pin description
7.
Device addressing
[1]
The Most Significant Bit (MSB) ‘b7’ is sent first.
A2, A1, A0 are hardware selectable pins.
A system could have up to eight PCF85103C-2 devices on the same I
2
C-bus,
equivalent to a 16 kbit EEPROM or 8 pages of 256 bytes of memory.
The eight addresses are defined by the state of the A0, A1, A2 inputs (logic level ‘1’
when connected to V
DD
, logic level ‘0’ when connected to GND).
Figure 3
shows the
various address combinations.
Fig 2.
Pin configuration.
1
2
3
4
8
7
6
5
A0
A1
A2
VSS
SDA
SCL
N.C.
VDD
P
002aaa251
Table 3:
Symbol
A0
A1
A2
V
SS
SDA
SCL
N.C.
V
DD
Pin description
Pin
1
2
3
4
5
6
7
8
Description
address input 0
address input 1
address input 2
negative supply voltage
serial data input/output (I
2
C-bus)
serial clock input (I
2
C-bus)
no connect
positive supply voltage
Table 4:
Selection
Bit
Device
Device address code
Device code
b6
0
Chip Enable
b2
A1
R/W
b0
R/W
b7
[1]
0
b5
1
b4
0
b3
A2
b1
A0
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PCF85103C-2P 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:256 x 8-bit CMOS EEPROM with I2C-bus interface
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