參數(shù)資料
型號： PC107AMGHU100LD
廠商： ATMEL CORP
元件分類： 外設及接口
英文描述： PCI Bridge Memory Controller
中文描述： MULTIFUNCTION PERIPHERAL, CBGA503
封裝： 33 X 33 MM, HITCE, CERAMIC, BGA-503
文件頁數(shù)： 43/50頁
文件大?。?/td> 453K
代理商： PC107AMGHU100LD
43
PC107A [Preliminary]
2137C–HIREL–03/04
Figure 31.
Example Voltage Sequencing Circuits
Decoupling
Recommendations
Due to the PC107A’s dynamic power management feature, large address and data
buses, and high operating frequencies, the PC107A can generate transient power
surges and high frequency noise in its power supply, especially while driving large
capacitive loads. This noise must be prevented from reaching other components in the
PC107A system, and the PC107A itself requires a clean, tightly regulated source of
power. Therefore, it is recommended that the system designer place at least one decou-
pling capacitor at each V
DD
, OV
DD
, GV
DD
, and LV
DD
pin of the PC107A. It is also
recommended that these decoupling capacitors receive their power from separate V
DD
,
OV
DD
, GV
DD
, and GND power planes in the PCB, utilizing short traces to minimize induc-
tance. These capacitors should have a value of 0.1 μF. Only ceramic SMT (surface
mount technology) capacitors should be used to minimize lead inductance, preferably
0508 or 0603, oriented such that connections are made along the length of the part.
In addition, it is recommended that there be several bulk storage capacitors distributed
around the PCB, feeding the V
DD
, OV
DD
, GV
DD
, BV
DD
, and LV
DD
planes, to enable quick
recharging of the smaller chip capacitors. These bulk capacitors should have a low ESR
(equivalent series resistance) rating to ensure the quick response time necessary. They
should also be connected to the power and ground planes through two vias to minimize
inductance. Suggested bulk capacitors-100
–
330 μF (AVX TPS tantalum or Sanyo
OSCON).
Connection
Recommendations
To ensure reliable operation, it is highly recommended to connect unused inputs to an
appropriate signal level. Unused active low inputs should be tied to OV
DD
. Unused active
high inputs should be connected to GND. All NC (no-connect) signals must remain
unconnected.
Power and ground connections must be made to all external V
DD
, OV
DD
, GV
DD
, LV
DD
,
BV
DD
, and GND pins of the PC107A.
The PCI_SYNC_OUT signal is intended to be routed halfway out to the PCI devices and
then returned to the PCI_SYNC_IN input of the PC107A.
The SDRAM_SYNC_OUT signal is intended to be routed halfway out to the SDRAM
devices and then returned to the SDRAM_SYNC_IN input of the PC107A. The trace
length may be used to skew or adjust the timing window as needed. See Motorola appli-
cation note "AN1794/D" for more information on this topic.
The TRST signal must be asserted during reset to ensure proper initialization and oper-
ation of the PC107A. It is recommended that the TRST signal be connected to the
system HRESET signal or pulled down with a 100
- 1 k
resistor.
+ 5V
Source
+ 3.3V
Source
5V
3.3V
3.3V
MUR420
MUR420
IN5820
IN5820
2.5V
2.5V
+ 2.5V
Source
相關PDF資料
PDF描述
PC107AMZFU100L PCI Bridge Memory Controller
PC107AMZFU100LC PCI Bridge Memory Controller
PC107AMZFU100LD PCI Bridge Memory Controller
PC107B
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相關代理商/技術參數(shù)
參數(shù)描述
PC107AMZFU100L 制造商:ATMEL 制造商全稱:ATMEL Corporation 功能描述:PCI Bridge Memory Controller
PC107AMZFU100LC 制造商:ATMEL 制造商全稱:ATMEL Corporation 功能描述:PCI Bridge Memory Controller
PC107AMZFU100LD 制造商:ATMEL 制造商全稱:ATMEL Corporation 功能描述:PCI Bridge Memory Controller
PC107AVGHU100L 制造商:ATMEL 制造商全稱:ATMEL Corporation 功能描述:PCI Bridge Memory Controller
PC107AVGHU100LC 制造商:ATMEL 制造商全稱:ATMEL Corporation 功能描述:PCI Bridge Memory Controller
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