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參數(shù)資料
| 型號(hào)： | OX12PCI840 |
| 廠商： | Electronic Theatre Controls, Inc. |
| 英文描述： | Integrated Parallel Port and PCI interface |
| 中文描述： | 集成的并行端口和PCI接口 |
| 文件頁數(shù)： | 24/32頁 |
| 文件大?。?/td> | 541K |
| 代理商： | OX12PCI840 |
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Data Sheet Revision 1.2
Page 24
OX12PCI840
OXFORD SEMICONDUCTOR LTD.
Bits
15
Description
‘0’ = This is the last configuration WORD in for
the selected function in the Function-Header.
‘1’ = There is another WORD to follow for this
function.
These seven bits define the byte-offset of the PCI
configuration register to be programmed. For
example the byte-offset of the Interrupt Pin
register is 0x3D. Offset values are tabulated in
section 4.2.
8-bit value of the register to be programmed
14:8
7:0
Table 11: Zone 3 data format (data)
Table 12 shows which PCI Configuration registers are
writable from the EEPROM for each function.
Offset
Bits
Description
0x02
7:0
Device ID bits 7 to 0.
0x03
7:0
Device ID bits 15 to 8.
0x06
3:0
Must be ‘0000’.
0x06
4
Extended Capabilities.
0x06
7:5
Must be ‘000’.
0x09
7:0
Class Code bits 7 to 0.
0x0A
7:0
Class Code bits 15 to 8.
0x0B
7:0
Class Code bits 23 to 16.
0x2E
7:0
Subsystem ID bits 7 to 0.
0x2F
7:0
Subsystem ID bits 15 to 8.
0x3D
7:0
Interrupt pin.
0x42
7:0
Power Management Capabilities
bits 7 to 0.
0x43
7:0
Power Management Capabilities
bits 15 to 8.
Table 12: EEPROM-writable PCI configuration registers
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| OX12PCI840-PQAG | 功能描述:外圍驅(qū)動(dòng)器與原件 - PCI PCI bridge to parallel port RoHS:否 制造商:PLX Technology 工作電源電壓: 最大工作溫度: 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:FCBGA-1156 封裝:Tray |
| OX12PCI840-PQC60-A | 制造商:OXFORD 制造商全稱:OXFORD 功能描述:Integrated Parallel Port and PCI interface |
| OX1340 | 制造商:RALTRON 制造商全稱:RALTRON 功能描述:OCXO |
| OX1341 | 制造商:RALTRON 制造商全稱:RALTRON 功能描述:OCXO |
| OX1440 | 制造商:RALTRON 制造商全稱:RALTRON 功能描述:OCXO |
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