參數(shù)資料
型號: NRF9E5IC
廠商: Electronic Theatre Controls, Inc.
英文描述: 433/868/915MHz RF Transceiver with Embedded 8051 Compatible Microcontroller and 4 Input, 10 Bit ADC
中文描述: 433/868/915MHz RF收發(fā)器與8051兼容的嵌入式微控制器和4輸入,10位ADC
文件頁數(shù): 56/104頁
文件大小: 1436K
代理商: NRF9E5IC
PRODUCT SPECIFICATION
nRF9E5 Single Chip Transceiver with Embedded Microcontroller and ADC
Main office: Nordic Semiconductor ASA - Vestre Rosten 81, N-7075 Tiller, Norway -Phone +4772898900 - Fax +4772898989
Revision: 1.1
Page 56 of 104
June 2004
16.7.2
Watchdog Reset
If the Watchdog reset signal goes active, nRF9E5 enters the same reset sequence as for
power-on reset. That is, the internal voltage generators and oscillators start up, the SFRs
are initialized to their reset values, as listed in Table 62, and thereafter the CPU begins
program execution at the standard reset vector address 0x0000. The startup time from
watchdog reset is somewhat shorter; expect a variation from 0.4 to 2ms depending on
processing, temperature and supply voltage.
16.7.3
Program Reset Address
The program reset address is controlled by the RSTREAS register, SFR 0xB1, see Table
48This register shows which reset source that caused the last reset, and provides a
choice of two different program start addresses. The default value is power-on reset,
which starts the boot loader, while a watchdog reset does not reboot and restarts at
address 0 of the already loaded program.
Addr
SFR
(hex)
B1
R/W
#bit
Init
(hex)
Name
Function
R/W
2
02
RSTREAS
bit 0: Reason for last reset
0: POR
1: Any other reset source
Clear this bit in software to force a
reboot after jump to zero (boot loader
will load code RAM if this bit is 0)
bit 1: Use IROM for reset vector
0: Reset vectors to 0x0000.
1: Reset vectors to 0x8000.
Table 48 Reset control register - SFR 0xB1.
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