參數(shù)資料
型號： NRF9E5IC
廠商： Electronic Theatre Controls, Inc.
英文描述： 433/868/915MHz RF Transceiver with Embedded 8051 Compatible Microcontroller and 4 Input, 10 Bit ADC
中文描述： 433/868/915MHz RF收發(fā)器與8051兼容的嵌入式微控制器和4輸入，10位ADC
文件頁數(shù)： 35/104頁
文件大?。?/td> 1436K
代理商： NRF9E5IC
PRODUCT SPECIFICATION
nRF9E5 Single Chip Transceiver with Embedded Microcontroller and ADC
Main office: Nordic Semiconductor ASA - Vestre Rosten 81, N-7075 Tiller, Norway -Phone +4772898900 - Fax +4772898989
Revision: 1.1
Page 35 of 104
June 2004
11.2
SPI – Instruction Set
The available commands to be used on the SPI-interface are given in Table 21.
Whenever CSN is set low the interface would expect an instruction. Every new
instruction has to be presided by a high to low transaction on CSN.
Instruction set for the Transceiver and AD converter subsystem
Instruction Name
Instruction
Format
W_RF_CONFIG
(WRC)
Operation
0000 AAAA
Write Configuration-register. AAAA indicates which byte
the write operation is to be started from. Number of bytes
depending on start address AAAA.
Read Configuration-register. AAAA indicates which byte
the read operation is to be started from. Number of bytes
depending on start address AAAA.
Write TX-payload: 1 – 32 bytes. A write operation will
always start at byte 0.
Read TX-payload: 1 – 32 bytes. A read operation will
always start at byte 0.
Write TX-address: 1 – 4 bytes. A write operation will
always start at byte 0.
Read TX-address: 1 – 4 bytes. A read operation will
always start at byte 0.
Read RX-payload: 1 – 32 bytes. A read operation will
always start at byte 0.
Read ADC data. A indicates which byte the read
operation is to be started from.
Write ADC configuration register: 1 – 3 bytes.
A write operation will always start at byte 0.
Read ADC configuration register: 1 – 3 bytes.
A read operation will always start at byte 0.
Special command for fast setting of CH_NO,
HFREQ_PLL and PA_PWR in the CONFIGURATION
REGISTER. CH_NO= ccccccccc, HFREQ_PLL = h
PA_PWR = pp
Special command for start of an ADC conversion for a
given source – ssss = CHSEL.
R__RF_CONFIG
(RRC)
0001 AAAA
W_TX_PAYLOAD
(WTP)
R_TX_PAYLOAD
(RTP)
W_TX_ADDRESS
(WTA)
R_TX_ADDRESS
(RTA)
R_RX_PAYLOAD
(RRP)
R_ADC_DATA
(RAD)
W_ADC_CONFIG
(WAC)
R_ADC_CONFIG
(RAC)
CHANNEL_CONFIG
(CC)
0010 0000
0010 0001
0010 0010
0010 0011
0010 0100
0100 000A
0100 0100
0100 0110
1000 pphc
cccc cccc
START_ADC_CONV
(SAV)
1100 ssss
Table 21 Instruction set for the Transceiver AD converter subsystem.
A read or a write operation may operate on a single byte or on a set of succeeding bytes
from a given start address defined by the instruction. When accessing succeeding bytes
one will read or write MSB of the byte with the smallest byte number first. The content
of the status-register will always be read to MISO after a high to low transition on CSN.
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