參數(shù)資料
型號： NRF9E5IC
廠商： Electronic Theatre Controls, Inc.
英文描述： 433/868/915MHz RF Transceiver with Embedded 8051 Compatible Microcontroller and 4 Input, 10 Bit ADC
中文描述： 433/868/915MHz RF收發(fā)器與8051兼容的嵌入式微控制器和4輸入，10位ADC
文件頁數(shù)： 47/104頁
文件大?。?/td> 1436K
代理商： NRF9E5IC
PRODUCT SPECIFICATION
nRF9E5 Single Chip Transceiver with Embedded Microcontroller and ADC
Main office: Nordic Semiconductor ASA - Vestre Rosten 81, N-7075 Tiller, Norway -Phone +4772898900 - Fax +4772898989
Revision: 1.1
Page 47 of 104
June 2004
Table 39 explains the bit functions of the EXIF register.
Bit
EXIF.7
Function
IE5 - Interrupt 5 flag. IE5 = 1 indicates that a rising edge was detected on the radio AM
signal (see P2). IE5 must be cleared by software. Setting IE5 in software generates an
interrupt, if enabled.
IE4 - Interrupt 4 flag. IE4 = 1 indicates that a rising edge was detected on the radio DR
signal (see P2). IE4 must be cleared by software. Setting IE4 in software generates an
interrupt, if enabled.
IE3 - Interrupt 3 flag. IE3 = 1 indicates that the internal SPI module has sent or received
8 bits, and is ready for a new command. IE3 must be cleared by software. Setting IE3 in
software generates an interrupt, if enabled.
IE2 - Interrupt 2 flag. IE2 = 1 indicates that a rising edge was detected on the ADC’s
EOC signal (see chapter 10 ). IE2 must be cleared by software. Setting IE2 in software
generates an interrupt, if enabled.
Reserved. Read as 1.
Reserved. Read as 0.
EXIF.6
EXIF.5
EXIF.4
EXIF.3
EXIF.2-0
Table 39 EXIF Register – SFR 0x91.
Table 40 explains the bit functions of the EICON register.
Bit
EICON.7
EICON.6
EICON.5
EICON.4
EICON.3
Function
Not used.
Reserved. Read as 1.
Reserved. Read as 0.
Reserved. Read as 0.
WDTI - Wakeup (GPIO wakeup and RTC timer) interrupt flag. WDTI = 1 indicates a
wakeup event interrupt was detected. WDTI must be cleared by software before
exiting the interrupt service routine. Otherwise, the interrupt occurs again. Setting
WDTI in software generates a wakeup event interrupt, if enabled.
Reserved. Read as 0.
EICON.2-0
Table 40 EICON Register – SFR 0xD8.
Table 41 explains the bit functions of the EIE register.
Bit
EIE.7-5
EIE.4
Function
Reserved. Read as 1.
EWDI - Enable RTC wakeup timer interrupt. EWDI = 0 disables wakeup timer
interrupt (wdti). EWDI = 1 enables interrupts generated by wakeup.
EX5 - Enable interrupt 5. EX5 = 0 disables interrupt 5 (radio AM (address match)).
EX5 = 1 enables interrupts generated by the radio AM signal.
EX4 - Enable interrupt 4. EX4 = 0 disables interrupt 4 (radio DR (data ready)). EX4 = 1
enables interrupts generated by the radio DR signal.
EX3 - Enable interrupt 3. EX3 = 0 disables interrupt 3 (SPI READY). EX3 = 1 enables
interrupts generated by the SPI READY signal.
EX2 - Enable interrupt 2. EX2 = 0 disables interrupt 2 (ADC EOC). EX2 = 1 enables
interrupts generated by the ADC EOC signal.
EIE.3
EIE.2
EIE.1
EIE.0
Table 41 EIE Register – SFR 0xE8.
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