參數(shù)資料
型號: NRF9E5IC
廠商: Electronic Theatre Controls, Inc.
英文描述: 433/868/915MHz RF Transceiver with Embedded 8051 Compatible Microcontroller and 4 Input, 10 Bit ADC
中文描述: 433/868/915MHz RF收發(fā)器與8051兼容的嵌入式微控制器和4輸入,10位ADC
文件頁數(shù): 24/104頁
文件大?。?/td> 1436K
代理商: NRF9E5IC
PRODUCT SPECIFICATION
nRF9E5 Single Chip Transceiver with Embedded Microcontroller and ADC
Main office: Nordic Semiconductor ASA - Vestre Rosten 81, N-7075 Tiller, Norway -Phone +4772898900 - Fax +4772898989
Revision: 1.1
Page 24 of 104
June 2004
Typical ShockBurst
TM
RX:
1.
ShockBurst
TM
RX is selected by setting TRX_CE high and TX_EN low.
2.
After 650
μ
s nRF905 is monitoring the air for incoming communication.
3.
When the nRF905 senses a carrier at the receiving frequency, Carrier Detect
(CD) pin is set high.
4.
When a valid address is received, Address Match (AM) pin is set high.
5.
When a valid package has been received (correct CRC found), nRF905
removes the preamble, address and CRC bits, and the Data Ready (DR) pin is
set high.
6.
MCU sets the TRX_CE low to enter standby mode (low current mode).
7.
MCU can clock out the payload data at a suitable rate via the SPI interface.
8.
When all payload data is retrieved, nRF905 sets Data Ready (DR) and
Address Match (AM) low again.
9.
The chip is now ready for entering ShockBurst
TM
RX, ShockBurst
TM
TX or
power down mode.
If TRX_CE or TX_EN is changed during an incoming package, the nRF905 changes
mode immediately and the package is lost. However, if the MCU is sensing the Address
Match (AM) pin, it knows when the chip is receiving an incoming package and can
therefore decide whether to wait for the Data Ready (DR) signal or enter a different
mode.
To avoid spurious address matches it is recommended that the address length be 24 bits
or higher in length. Small addresses such as 8 or 16 bits can often lead to statistical
failures due to the address being repeated as part of the data packet. This can be avoided
by using a longer address.
Each byte within the address should be unique. Repeating bytes within the address
reduces the effectiveness of the address and increases its susceptibility to noise hence
increasing the packet error rate. The address should also have several level shifts (i.e.
10101100) to reduce the statistical effect of noise and hence reduce the packet error rate.
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