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參數(shù)資料

型號(hào)：	NAND512R3A2AZB6E
廠商：	STMICROELECTRONICS
元件分類：	PROM
英文描述：	64M X 8 FLASH 1.8V PROM, 35 ns, PBGA55
封裝：	8 X 10 MM, 1.20 MM HEIGHT, 0.80 MM PITCH, ROHS COMPLIANT, TFBGA-55
文件頁(yè)數(shù)：	52/57頁(yè)
文件大?。?/td>	916K
代理商：	NAND512R3A2AZB6E

NAND128-A, NAND256-A, NAND512-A, NAND01G-A

56/57

REVISION HISTORY

Table 29. Document Revision History

Date

Version

Revision Details

06-Jun-2003

1.0

First Issue

07-Aug-2003

2.0

Design Phase

27-Oct-2003

3.0

Engineering Phase

03-Dec-2003

4.0

Document promoted from Target Specification to Preliminary Data status.

VCC changed to VDD and ICC to IDD.

Title of Table 2.. changed to “Product Description” and Page Program Typical Timing

for NANDXXXR3A devices corrected. Table 1., Product List, inserted on page 2.

13-Apr-2004

5.0

WSOP48 and VFBGA55 packages added, VFBGA63 (9 x 11 x 1mm) removed.

Figure 19., Cache Program Operation, modified and note 2 modified. Note removed

for tWLWH timing in Table 20., AC Characteristics for Command, Address, Data Input.

Meaning of tBLBH4 modified, partly replaced by tWHBH1 and tWHRL min for 3V devices

modified in Table 21., AC Characteristics for Operations.

References removed from RELATED DOCUMENTATION section and reference

made to ST Website instead.

Figure 6., Figure 7., Figure 29. and Figure 32. modified. Read Electronic Signature

paragraph clarified and Figure 28., Read Electronic Signature AC Waveform,

modified. Note 2 to Figure 30., Read C Operation, One Page AC Waveform, removed.

Note 3 to Table 7., Address Insertion, x16 Devices removed. Only 00h Pointer

operations are valid before a Cache Program operation. IDD4 removed from Table

18., DC Characteristics, 1.8V Devices. Note added to Figure 32., Block Erase AC

Waveform. Small text changes.

28-May-2004

6.0

TFBGA55 package added (mechanical data to be announced). 512Mb Dual Die

devices added. Figure 19., Cache Program Operation modified.

Package code changed for TFBGA63 8.5 x 15 x 1.2mm, 6x8 ball array, 0.8mm pitch

(1Gbit Dual Die devices) in Table 28., Ordering Information Scheme.

02-Jul-2004

7.0

Cache Program removed from document. TFBGA55 package specifications added

(Figure 40., TFBGA55 8 x 10mm - 6x8 active ball array - 0.80mm pitch, Package

Outline and Table 25., TFBGA55 8 x 10mm - 6x8 active ball array - 0.80mm pitch,

Package Mechanical Data).

Test conditions modified for VOL and VOH parameters in Table 19., DC Characteristics,

3V Devices.

01-Oct-2004

8.0

Third part number corrected in Table 1., Product List. 512 Mbit Dual Die information

added to Table 10., Copy Back Program Addresses. Block Erase last address cycle

modified. Definition of a Bad Block modified in Bad Block Management paragraph.

RoHS COMPLIANCE added to SUMMARY DESCRIPTION. Figure 3., Logic Block

Diagram modified.

Document promoted from Preliminary Data to Full Datasheet status.

03-Dec-2004

9.0

Automatic Page 0 Read at Power-Up option no longer available.

PC Demo board with simulation software removed from list of available development

tools. Chip Enable (E) paragraph clarified.

13-Dec-2004

10.0

Rref parameter added to Table 16., Operating and AC Measurement Conditions.

Description of the family clarified in the SUMMARY DESCRIPTION section.

25-Feb-2005

11.0

WSOP48 replaced with USOP48 package,

VFBGA63 (8.5 x 15 x 1mm) replaced with VFBGA63 (9 x 11 x 1mm) package,

TFBGA63 (8.5 x 15 x 1mm) replaced with TFBGA63 (9 x 11 x 1.2mm) package.

Changes to Table 21., Table 18. and Table 2.

相關(guān)PDF資料	PDF描述
NAND01GW3A0CZB1F	128M X 8 FLASH 3V PROM, 35 ns, PBGA63
NAND01GW3A2AN1	128M X 8 FLASH 3V PROM, 35 ns, PDSO48
NAND01GW3A2AZB1E	128M X 8 FLASH 3V PROM, 35 ns, PBGA63
NAND01GW3A0CZB1	128M X 8 FLASH 3V PROM, 35 ns, PBGA63
NAND01GW3A2BN6T	128M X 8 FLASH 3V PROM, 35 ns, PDSO48

相關(guān)代理商/技術(shù)參數(shù)	參數(shù)描述
NAND512R3A2BZA6E	功能描述:閃存 128Mbit-1Gbit 1.8/3V RoHS:否制造商:ON Semiconductor 數(shù)據(jù)總線寬度:1 bit 存儲(chǔ)類型:Flash 存儲(chǔ)容量:2 MB 結(jié)構(gòu):256 K x 8 定時(shí)類型: 接口類型:SPI 訪問(wèn)時(shí)間: 電源電壓-最大:3.6 V 電源電壓-最小:2.3 V 最大工作電流:15 mA 工作溫度:- 40 C to + 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體: 封裝:Reel
NAND512R3A2CZA6E	功能描述:IC FLASH 512MBIT 63VFBGA RoHS:是類別:集成電路 (IC) >> 存儲(chǔ)器系列:- 產(chǎn)品變化通告:Product Discontinuation 26/Apr/2010 標(biāo)準(zhǔn)包裝:136 系列:- 格式 - 存儲(chǔ)器:RAM 存儲(chǔ)器類型:SRAM - 同步，DDR II 存儲(chǔ)容量:18M（1M x 18）速度:200MHz 接口:并聯(lián) 電源電壓:1.7 V ~ 1.9 V 工作溫度:0°C ~ 70°C 封裝/外殼:165-TBGA 供應(yīng)商設(shè)備封裝:165-CABGA（13x15）包裝:托盤其它名稱:71P71804S200BQ
NAND512R3A2CZA6F	制造商:Micron Technology Inc 功能描述:SLC NAND Flash Parallel 1.8V 512Mbit 64M x 8bit 15us 63-Pin VFBGA T/R
NAND512R3A2DDI6	制造商:Micron Technology Inc 功能描述:NAND - Gel-pak, waffle pack, wafer, diced wafer on film
NAND512R3A2DZA6E	功能描述:IC FLASH 512MBIT 63VFBGA RoHS:是類別:集成電路 (IC) >> 存儲(chǔ)器系列:- 標(biāo)準(zhǔn)包裝:1,000 系列:- 格式 - 存儲(chǔ)器:EEPROMs - 串行存儲(chǔ)器類型:EEPROM 存儲(chǔ)容量:4K (512 x 8) 速度:400kHz 接口:I²C，2 線串口電源電壓:2.7 V ~ 5.5 V 工作溫度:-40°C ~ 85°C 封裝/外殼:8-SOIC（0.173"，4.40mm 寬）供應(yīng)商設(shè)備封裝:8-MFP 包裝:帶卷 (TR)

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