參數(shù)資料
型號(hào)： MT90883
廠商： Zarlink Semiconductor Inc.
英文描述： TDM to Packet Processors
中文描述： TDM到分組處理器
文件頁(yè)數(shù)： 70/97頁(yè)
文件大小： 702K
代理商： MT90883
MT90880/1/2/3
Data Sheet
70
Zarlink Semiconductor Inc.
The PCI configuration registers are used to set up how the MT9088x will fit into the system in which it will be
placed. They support the method defined in the PCI Rev 2.2 Specification to determine the size of the memory
spaces required by the MT9088x so that the System Host can allocate enough memory. They also contain
manufacturer ID information, along with device and revision identifiers, base addresses for the internal register
and memory spaces, and various control and status fields. The MT9088x does not include Vital Product Data
information or support.
It is not possible to use the MT9088x itself as a PCI Host, and the MT9088x does not provide PCI bus
Arbitration capabilities.
The configuration registers are detailed in the document "MT90880 Programmers' Model" (related document 1).
Memory Map
The following diagram (Figure 30) represents the 32-bit PCI bus, and how the address allocation for MT90880
and the External Packet Memory are seen from a system point of view. The register and memory base
addresses are programmable, and form part of the MT90880 PCI Configuration registers set.
Figure 30 - MT90880 Memory and Register Space Organization
System Software Reset
The MT90880 has the capability for a software-initiated reset. The PCI interface can be excepted from the
general reset if required, by programming a bit in the system control register. This prevents the software reset
from destroying the PCI configuration state, allowing the Host CPU to continue to access the device without
having to re-program the configuration data.
6.10.5 Signalling Environment
The MT9088x PCI Interface is compatible with a 3.3V PCI signalling environment and can be directly connected
to other similarly compatible devices in that environment. The 5 V PCI signalling environment is not supported
as the MT9088x PCI Interface is not 5 V tolerant.
0x00000000
Register Base Address
Memory Base Address
0xFFFFFFFF
Allocated to MT90880 by
system software
(128 KB of 16MB used)
Allocated to MT90880 by
system software
(up to 8MB of 16MB used)
Internal Register & Memory space of
MT90880
External Packet Memory space
of MT90880
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
MT90883A 制造商:ZARLINK 制造商全稱:Zarlink Semiconductor Inc 功能描述:TDM to Packet Processors
MT90883A/IG 制造商:ZARLINK 制造商全稱:Zarlink Semiconductor Inc 功能描述:TDM to Packet Processors
MT90883BP1N 制造商:ZARLINK 制造商全稱:Zarlink Semiconductor Inc 功能描述:TDM to Packet Processors
MT90883IG 制造商:ZARLINK 制造商全稱:Zarlink Semiconductor Inc 功能描述:TDM to Packet Processors
MT9088IG 制造商:ZARLINK 制造商全稱:Zarlink Semiconductor Inc 功能描述:TDM to Packet Processors
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