參數(shù)資料
型號: MT9074
廠商: Mitel Networks Corporation
英文描述: T1/E1/J1 Single Chip Transceiver(T1/E1/J1單片收發(fā)器)
中文描述: T1/E1/J1收發(fā)單芯片收發(fā)器(T1/E1/J1收發(fā)單片收發(fā)器)
文件頁數(shù): 77/120頁
文件大?。?/td> 362K
代理商: MT9074
Advance Information
MT9074
77
2
PRBSOM
PRBS
Interrupt
. When unmasked
(PRBSO = 1), an interrupt is
initiated on overflow of PRBS
counter (page 04H, address
10H) from FFH to 0H. If 1 -
unmasked, 0 - masked.
Counter
Overflow
1
PRBSMFO
M
PRBS MultiFrame Counter
Overflow
Interrupt
unmasked an interrupt will be
generated
whenever
multiframe counter attached
to the PRBS error counter
overflows. If 1 - unmasked, 0 -
masked.
When
the
0
- - -
Unused
.
Bit
Name
Functional Description
7-5
- - -
Unused
4
JAIM
Jitter Attenuation Interrupt Mask.
When unmasked, an interrupt will be
initiated when the jitter attenuator
FIFO comes within four bytes of an
overflow or underflow condition. If 1 -
unmasked, 0 - masked.
3
1SECIM
One Second Status Interrupt Mask
.
When unmasked (1SECI = 1), an
interrupt is initiated when the 1SEC
status bit changes from zero to one. If
1 - unmasked, 0 - masked.
2
5SECIM
Five Second Status Interrupt Mask.
When unmasked (5SECI = 1), an
interrupt is initiated when the 5SECI
status bit changes from zero to one. If
1 - unmasked, 0 - masked.
1
RCRIM
RCRI
Interrupt
Mask.
When
unmasked (RCRI=1), an interrupt is
initiated when RCR (remote alarm &
CRC-4 error) status bit changes from
zero to one. If 1 - unmasked, 0 -
masked.
Table 93 - Interrupt Mask Word Three (E1)
(Page 1, Address 1EH)
Bit
Name
Functional Description
Table 92 - Interrupt Mask Word Two (E1)
(Page 1, Address 1DH)
0
SIGIM
Signalling (CAS) Interrupt Mask
.
When unmasked and any of the
receive ABCD bits of any channel
changes state an interrupt is initiated.
If 1 - unmasked, 0 - masked.
Bit
Name
Functional Description
Table 93 - Interrupt Mask Word Three (E1)
(Page 1, Address 1EH)
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