
MSAN-123
Application Note
A-110
Memory Low, CR
b
4 and CR
b
3 must be set to ‘10’. To
access STo7s’ 32 byte segment, CR
b
2, CR
b
1 and
CR
b
0 must be set to ‘111’. CR
b
7 may be either a ‘1‘
or a ‘0’ for writes (if a ‘0’ then CR
b
4 and CR
b
3 must
have been set properly). For reads, CR
b
7 must be a
‘0’. If it was a ‘1’, then CR
b
4 and CR
b
3 would have
been inconsequential and the read would have been
from Data Memory. CR
b
6 and CR
b
5 do not affect the
access of the Connection Memory Low byte. To
access Channel 1, A4-A0 must be set to ‘00001’.
The information that must be written to the
Connection Memory Low byte to indicate the source
of the information output in STo7 Channel 1 is
‘00011111’. The three most significant bits of this
byte are selecting the input stream and the five least
significant bits are accessing the input channel on
that stream.
To access Connection Memory High for the same
output channel, CR
b
4 and CR
b
3 must be set to ‘11’
and CR
b
7 must be ‘0’. CR
b
2, CR
b
1 and CR
b
0 need
not be changed, and the same setting of A4-A0 must
be used. CMH
b
0 must be set to a ‘1’ to ensure that
the output channel is not in a high impedance state
and CMH
b
2 must be ‘0’ so the channel is in
Switching mode. For the same reason, CR
b
6 must
be a ‘0’.
The last example involves writing information from
the microprocessor port to output Channel 16 on
STo4. The associated bytes for this channel in the
Connection Memories may be accessed in the
manner described in the last example. The only
difference in the procedure is the setting of CR
b
2,
CR
b
1 and CR
b
0 (‘100’), and the setting of A4-A0
(‘10000’). If CR
b
6 is set to a ‘1’ (overall Message
mode) then the contents of the Connection Memory
high are unimportant. If CR
b
6 is a logical ‘0’, CMH
b
2
must be set to a ‘1’ to specify Message mode, and
CMH
b
0 must be set to enable the output drivers for
STo4 Channel 16. Information desired in the
channel must be written to the associated
Connection Memory Low byte.
4.0 Delay through the MT8980
There are standards which dictate the allowable
delay that can be tolerated in an end-to-end
communication link. When designing a system, the
applicable standard or standards must be selected
and met. The delay through the MT8980 is
described and explained here, so the user may
understand how the MT8980 may be used to comply
successfully with a particular standard.
Figure 4 - Delay for Information Switched One Channel Forward, from Channel 31 to Channel Zero
Figure 5 - Delay for Information Switched Three Channels Forward, from Channel 31 to Channel Two
F0i
INPUT STREAM
OUTPUT STREAM
CHANNEL
A
B
C
Z
A
B
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
0
0
31
1
2
1
2
30
31
1
2
31
30
X
0
Switching Delay, 33 channels
F0i
INPUT STREAM
OUTPUT STREAM
CHANNEL
A
B
C
X
X
X
X
X
X
X
X
X
X
X
X
X
X
A
X
X
X
X
B
X
X
X
X
C
0
0
31
1
2
1
2
30
31
1
2
31
30
0
Switching Delay, 3 channels