參數(shù)資料
型號: MT8980
廠商: Mitel Networks Corporation
英文描述: ()
中文描述: ()
文件頁數(shù): 4/11頁
文件大?。?/td> 80K
代理商: MT8980
MSAN-123
Application Note
A-108
from the microprocessor port). Channel information
is converted from the serial ST-BUS format into a
parallel format and stored in a corresponding byte in
the Data Memory in an unchanging sequence. The
size of the MT8980’s Data Memory is 256 bytes and
the size of the MT8981’s Data Memory is 128 bytes
(one byte of Data Memory per input channel).
Information may be read from the Data Memory in
two ways: through the microprocessor port, or by a
sequence that places Data Memory contents into an
ST-BUS output channel. For a microprocessor port
access, the address of a location in Data Memory is
formed by Control Register bits 2, 1 and 0 (CR
b
2,
CR
b
1 and CR
b
0) and external address bits A4, A3,
A2, A1 and A0. When information in Data Memory is
destined for an ST-BUS output channel, the address
for Data Memory is formed by the contents of the
Connection Memory Low byte associated with the
output channel. This latter type of Data Memory
access can only occur when the output channel has
been placed into Switching mode.
Connection Memory Low is a block of memory the
same size as the Data Memory for the relative device
(MT8980 or MT8981). Each byte in Connection
Memory Low is associated with an output channel.
Information can be placed into Connection Memory
Low locations only through the microprocessor port,
but it may exit in several directions: the information
may be read by the microprocessor, form the
address of a location in Data Memory (Switching
Figure 3 - Relationship Between CR
b
4-0, A4-0 and Channel Access for the MT8980
CONTROL REGISTER
CR
b
7
CR
b
6
CR
b
5
CR
b
4
CR
b
3
CR
b
2
CR
b
1
CR
b
0
CR
b
4
CR
b
3
0
1
1
1
0
1
CONNECTION MEMORY HIGH
CONNECTION MEMORY LOW
DATA MEMORY
CHANNEL 0
CHANNEL 0
CHANNEL 0
CHANNEL 0
CHANNEL 0
CHANNEL 0
CHANNEL 0
CHANNEL 0
CHANNEL 1
CHANNEL 1
CHANNEL 1
CHANNEL 1
CHANNEL 1
CHANNEL 1
CHANNEL 1
CHANNEL 1
CHANNEL 2
CHANNEL 2
CHANNEL 2
CHANNEL 2
CHANNEL 2
CHANNEL 2
CHANNEL 2
CHANNEL 2
CHANNEL 31
CHANNEL 31
CHANNEL 31
CHANNEL 31
CHANNEL 31
CHANNEL 31
CHANNEL 31
CHANNEL 31
100000
100001
100010
111111
External Address Bits A5-A0
CR
b
2
CR
b
1
CR
b
0
Stream
0
0
0
0
1
1
1
1
0
0
1
1
0
0
1
1
0
1
0
1
0
1
0
1
0
1
2
3
4
5
6
7
The Control Register is only accessed when
A5=0. All other address bits have no effect
when A5=0. When A5=1, only 32 bytes are
randomly accessible via A0 to A4 at any one
instant. Which 32 bytes are accessed is
determined by the state of CR
b
0 to CR
b
4. The
32 bytes correlate to 32 channel of one ST-
BUS stream.
BLOCK
SELECT
ST-BUS STREAM
SELECT
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MT8982 ISO-CMOS ST-BUS⑩ FAMILY Small Digital Switch (MiniDX)
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MT8982AN ISO-CMOS ST-BUS⑩ FAMILY Small Digital Switch (MiniDX)
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