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參數(shù)資料
| 型號(hào)： | MT58L256L18P1 |
| 廠商： | Micron Technology, Inc. |
| 英文描述： | 256K x 18,Pipelined, SCD SyncBurst SRAM(4Mb，流水線式，單循環(huán)取消選擇，同步脈沖靜態(tài)存儲(chǔ)器) |
| 中文描述： | 256 × 18，流水線，SCD的SyncBurst的SRAM（4MB，在流水線式，單循環(huán)取消選擇，同步脈沖靜態(tài)存儲(chǔ)器） |
| 文件頁數(shù)： | 15/28頁 |
| 文件大?。?/td> | 445K |
| 代理商： | MT58L256L18P1 |
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15
4Mb: 256K x 18, 128K x 32/36 Pipelined, SCD SyncBurst SRAM
MT58L256L18P1_2.p65 – Rev. 8/00
Micron Technology, Inc., reserves the right to change products or specifications without notice.
2000, Micron Technology, Inc.
4Mb: 256K x 18, 128K x 32/36
PIPELINED, SCD SYNCBURST SRAM
PRELIMINARY
2.5V I/O DC ELECTRICAL CHARACTERISTICS AND OPERATING CONDITIONS
(0°C
￡
T
A
￡
+70°C; V
DD
= +3.3V +0.3V/-0.165V; V
DD
Q = +2.5V +0.4V/-0.125V unless otherwise noted)
DESCRIPTION
Input High (Logic 1) Voltage
CONDITIONS
Data bus (DQx)
Inputs
SYMBOL
V
IH
Q
V
IH
MIN
1.7
1.7
MAX
UNITS
V
V
NOTES
1, 2
1, 2
V
DD
Q + 0.3
V
DD
+ 0.3
Input Low (Logic 0) Voltage
Input Leakage Current
Output Leakage Current
V
IL
IL
I
IL
O
-0.3
-1.0
-1.0
0.7
1.0
1.0
V
1, 2
3
0V
￡
V
IN
￡
V
DD
Output(s) disabled,
0V
￡
V
IN
￡
V
DD
Q (DQx)
I
OH
= -2.0mA
I
OH
= -1.0mA
μA
μA
Output High Voltage
V
OH
V
OH
1.7
2.0
–
–
V
V
1, 4
1, 4
Output Low Voltage
I
OL
= 2.0mA
I
OL
= 1.0mA
V
OL
V
OL
–
–
0.7
0.4
V
V
1, 4
1, 4
Supply Voltage
Isolated Output Buffer Supply
V
DD
V
DD
Q
3.135
2.375
3.6
2.9
V
V
1
1
NOTE:
1. All voltages referenced to V
SS
(GND).
2. Overshoot:
V
IH
￡
+4.6V for t
￡
t
KC/2 for I
￡
20mA
Undershoot:
V
IL
3
-0.7V for t
￡
t
KC/2 for I
￡
20mA
Power-up:
V
IH
￡
+3.6V and V
DD
￡
3.135V for t
￡
200ms
3. MODE has an internal pull-up, and input leakage = ±10μA.
4. The load used for V
OH
, V
OL
testing is shown in Figure 4 for 2.5V I/O. AC load current is higher than the shown DC
values. AC I/O curves are available upon request.
5. This parameter is sampled.
6. Preliminary package data.
TQFP THERMAL RESISTANCE
DESCRIPTION
Thermal Resistance
(Junction to Ambient)
CONDITIONS
SYMBOL
q
JA
TYP
46
UNITS NOTES
°C/W
Test conditions follow standard test methods
and procedures for measuring thermal
impedance, per EIA/JESD51.
5
Thermal Resistance
(Junction to Top of Case)
q
JC
2.8
°C/W
5
FBGA THERMAL RESISTANCE
DESCRIPTION
Junction to Ambient
(Airflow of 1m/s)
CONDITIONS
SYMBOL
q
JA
TYP
40
UNITS NOTES
°C/W
Test conditions follow standard test methods
and procedures for measuring thermal
impedance, per EIA/JESD51.
5, 6
Junction to Case (Top)
Junction to Pins
(Bottom)
q
JC
q
JB
9
17
°C/W
°C/W
5, 6
5, 6
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