參數(shù)資料
型號(hào)： MT49H32M9CFM-xx
廠商： Micron Technology, Inc.
英文描述： 288Mb SIO REDUCED LATENCY(RLDRAM II)
中文描述： 288Mb二氧化硅約化延遲（延遲DRAM二）
文件頁(yè)數(shù)： 10/44頁(yè)
文件大小： 1117K
代理商： MT49H32M9CFM-XX
16 MEG x 18, 32 MEG x 9
2.5V V
EXT
, 1.8V V
DD
, HSTL, SIO, RLDRAM II
pdf: 09005aef80a41b59/zip: 09005aef811ba111
MT49H8M18C_2.fm - Rev. F 11/04 EN
Micron Technology, Inc., reserves the right to change products or specifications without notice.
2004 Micron Technology, Inc. All rights reserved.
10
Commands
According to the functional signal description, the
following command sequences are possible. All input
states or sequences not shown are illegal or reserved.
All command and address inputs must meet setup and
hold times around the rising edge of CK.
NOTE:
1. X represents a “Don’t Care”; H represents a logic HIGH; L represents a logic LOW; A represents a valid address; and BA
represents a valid bank address.
2. Only A[17:0] are used for the MRS command.
3. See Table 3 above.
V
DD
Q
Supply
DQ Power Supply: Nominally, 1.5V or 1.8V. Isolated on the device for improved noise
immunity. See Table 19: “DC Electrical Characteristics and Operating Conditions” on
page 41 for range.
Ground.
DQ Ground: Isolated on the device for improved noise immunity.
Power Supply: Isolated Termination Supply. Nominally, V
DD
Q/2. See Table 19, DC
Electrical Characteristics and Operating Conditions, on page 41 for range.
No Function: These balls may be connected to ground.
Do Not Use: These balls may be connected to ground.
V
SS
V
SS
Q
V
TT
Supply
Supply
Supply
NF
DNU
–
–
Table 2:
Ball Descriptions (continued)
SYMBOL
TYPE
DESCRIPTION
Table 3:
Address Widths at Different
Burst Lengths
BURST LENGTH
CONFIGURATION
x18
19:0
18:0
17:0
x9
20:0
19:0
18:0
BL = 2
BL = 4
BL = 8
Table 4:
Command Table
1
OPERATION
CODE
DESEL/NOP
MRS
READ
WRITE
AREF
CS#
H
L
L
L
L
WE#
X
L
H
L
H
REF#
X
L
H
H
L
A(20:0)
X
OPCODE
A
A
X
B(2:0)
X
X
BA
BA
BA
NOTES
Device DESELECT/No Operation
MRS: Mode Register Set
READ
WRITE
AUTO REFRESH
2
3
3
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