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參數(shù)資料
| 型號： | MSC8101M1250F |
| 廠商： | MOTOROLA INC |
| 元件分類： | 數(shù)字信號處理 |
| 英文描述： | Network Digital Signal Processor |
| 中文描述： | 64-BIT, 62.5 MHz, OTHER DSP, PBGA332 |
| 封裝： | 17 X 17 MM, LIDDED FLIP CHIP, PLASTIC, BGA-332 |
| 文件頁數(shù)： | 16/28頁 |
| 文件大小： | 378K |
| 代理商： | MSC8101M1250F |
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Silicon Errata for the MSC8101 Processor, Mask 0K40A, Rev. 5
16
Freescale Semiconductor
CPM40
Corruption in AAL0 IDLE Cell
Date Added:
5/30/2000
There is a rare case when transmitting an ATM idle cell that the idle cell may be
corrupted. This can occur in certain internal sequences of events that cannot be controlled
or detected by the user.
Place the Idle Base template at address 64 byte align minus 4. For example use
Idle_BASE = 0x2cfc not 0x2d00.
4648b
Rev A
0K40A
CPM41
Limitation in ATM Controller
Date Added:
5/30/2000
There are some limitations in the ATM controller. The first limitation is that only the
first 8 PM tables can be used instead of 64. When using these 8 tables, the user must clear
the 5 most significant bits of TBD_BASE (in case of Tx PM) or RBD_BASE (in case of
Rx PM). The second limitation is that only the first 2048 ATM channel numbers can be
used.
There is a microcode patch that can fix the PM limitation. The ATM channel number
limitation has no workaround.
4744
Rev A
0K40A
CPM42
Data Corruption in MCC
Date Added:
5/30/2000
Description:
Data corruption may occur in the receive buffers of MCC channels when more then
one TDM slot uses 7 bits of contiguous data.
Workaround:
It is possible to avoid this problem by splitting the 7 bits slots between two SI ram
entries such that one entry will represent 4 bits of the slot and the other SI entry will represent 3
bits of the slot. The errata occurs only when all the 7 bits are represented by one entry in the SI
ram.
System Number:
4743
Fix Plan:
Rev A
0K40A
CPM43
TxCLAV Ignored By UTOPIA in Single PHY Mode
Date Added:
5/30/2000
Description:
When the FCC transmitter is configured to work in UTOPIA single PHY master
mode, it ignores negation of the TxCLAV signal. Therefore, the UTOPIA slave cannot control the
flow of cells by negating TxCLAV. Note that this bug affects Rev A.1 chips only.
Workaround:
Configure the FCC to work in multi-master mode but limit the number of PHYs
to 1 by programming: FPSMR[LAST PHY] = 5’b0
System Number:
4882
Fix Plan:
Rev A
0K40A
Table 2.
Silicon Errata (Continued)
Errata
Number
Errata Description
Applies
to Mask
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| MSC8101 | Network Digital Signal Processor |
| MSC8122_07 | Quad Digital Signal Processor |
| MSC8122 | Quad Core 16-Bit Digital Signal Processor |
| MSC8126 | Quad Digital Signal Processor |
| MSC8144EC | Quad Core Digital Signal Processor |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| MSC8101M1375C | 制造商:MOTOROLA 制造商全稱:Motorola, Inc 功能描述:Network Digital Signal Processor |
| MSC8101M1375F | 功能描述:DSP 16BIT 275MHZ CPM 332-FCPBGA RoHS:否 類別:集成電路 (IC) >> 嵌入式 - DSP（數(shù)字式信號處理器） 系列:StarCore 標準包裝:40 系列:TMS320DM64x, DaVinci™ 類型:定點 接口:I²C，McASP，McBSP 時鐘速率:400MHz 非易失內(nèi)存:外部 芯片上RAM:160kB 電壓 - 輸入/輸出:3.30V 電壓 - 核心:1.20V 工作溫度:0°C ~ 90°C 安裝類型:表面貼裝 封裝/外殼:548-BBGA，F(xiàn)CBGA 供應(yīng)商設(shè)備封裝:548-FCBGA（27x27） 包裝:托盤 配用:TMDSDMK642-0E-ND - DEVELPER KIT W/NTSC CAMERA296-23038-ND - DSP STARTER KIT FOR TMS320C6416296-23059-ND - FLASHBURN PORTING KIT296-23058-ND - EVAL MODULE FOR DM642TMDSDMK642-ND - DEVELOPER KIT W/NTSC CAMERA |
| MSC8101M1500F | 功能描述:DSP 16BIT 300MHZ CPM 332-FCPBGA RoHS:否 類別:集成電路 (IC) >> 嵌入式 - DSP（數(shù)字式信號處理器） 系列:StarCore 標準包裝:40 系列:TMS320DM64x, DaVinci™ 類型:定點 接口:I²C，McASP，McBSP 時鐘速率:400MHz 非易失內(nèi)存:外部 芯片上RAM:160kB 電壓 - 輸入/輸出:3.30V 電壓 - 核心:1.20V 工作溫度:0°C ~ 90°C 安裝類型:表面貼裝 封裝/外殼:548-BBGA，F(xiàn)CBGA 供應(yīng)商設(shè)備封裝:548-FCBGA（27x27） 包裝:托盤 配用:TMDSDMK642-0E-ND - DEVELPER KIT W/NTSC CAMERA296-23038-ND - DSP STARTER KIT FOR TMS320C6416296-23059-ND - FLASHBURN PORTING KIT296-23058-ND - EVAL MODULE FOR DM642TMDSDMK642-ND - DEVELOPER KIT W/NTSC CAMERA |
| MSC8101UG/D | 制造商:FREESCALE 制造商全稱:Freescale Semiconductor, Inc 功能描述:Network Digital Signal Processor |
| MSC8101VT1250F | 功能描述:IC DSP 16BIT 250MHZ 332-FCPBGA RoHS:是 類別:集成電路 (IC) >> 嵌入式 - DSP（數(shù)字式信號處理器） 系列:StarCore 標準包裝:2 系列:StarCore 類型:SC140 內(nèi)核 接口:DSI，以太網(wǎng)，RS-232 時鐘速率:400MHz 非易失內(nèi)存:外部 芯片上RAM:1.436MB 電壓 - 輸入/輸出:3.30V 電壓 - 核心:1.20V 工作溫度:-40°C ~ 105°C 安裝類型:表面貼裝 封裝/外殼:431-BFBGA，F(xiàn)CBGA 供應(yīng)商設(shè)備封裝:431-FCPBGA（20x20） 包裝:托盤 |
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