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參數(shù)資料
| 型號： | MSC8101M1250F |
| 廠商： | MOTOROLA INC |
| 元件分類： | 數(shù)字信號處理 |
| 英文描述： | Network Digital Signal Processor |
| 中文描述： | 64-BIT, 62.5 MHz, OTHER DSP, PBGA332 |
| 封裝： | 17 X 17 MM, LIDDED FLIP CHIP, PLASTIC, BGA-332 |
| 文件頁數(shù)： | 10/28頁 |
| 文件大?。?/td> | 378K |
| 代理商： | MSC8101M1250F |
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Silicon Errata for the MSC8101 Processor, Mask 0K40A, Rev. 5
10
Freescale Semiconductor
SC7
Change of Flow May Cause Incorrect Trace-Buffer Data
Date Added:
2/19/2002
Description:
When programing the EOnCE for tracing events of change of flow (TCHOF) and
interrupts (TINT), the Trace-Buffer will be updated on every event by the source and destination
addresses. In the event of a CHOF (change of flow) to another CHOF with an interrupt request in
between, the Trace-Buffer will be updated with additional data. The additional data is incorrect
and is not needed for the trace.
Workaround:
Perform post-processing after reading the Trace-Buffer. Search in the data for a
source address and the destination before it should be the destination of that source. That means
there is a destination which came before its source. Delete the source and the previous data.
7794
Fix Plan:
TBD
0K40A
SC8
Debug Exception Request Form JTAG is Not Accepted During Core Freeze
Date Added:
5/21/2002
Description:
JTAG debug exception request is not accepted by the Core during freeze. If the re-
quest is asserted and negated during core freeze, the request will be discarded.
Workaround:
Assert Debug request from JTAG. When entering the exception routine, assert by
software an external pin (EE pin for example), to signal the exception Service Routine is now ex-
ecuted. After that, a new JTAG instruction can be written.
Fix Plan:
TBD
0K40A
SC9
EE Pins Do Not Enable Different EOnCE Modules During Core Freeze
Date Added:
5/21/2002
Description:
If EE pins are asserted to enable events in EOnCE during core freeze and the request
is negated during the same core freeze, the event is not enabled.
Workaround:
Poll on Core status from JTAG. Assert the EE pin(s) until the Core is not in freeze
for at least 3 cycles.
Fix Plan:
TBD
0K40A
CPM2
CAM Access Not Atomic
Date Added:
5/30/2000:
Description:
The bus atomicity mechanism for CAM access may not function correctly when
the CPM’s DMA accesses the CAM. This only affects systems in which multiple CPMs will ac-
cess the CAM.
Workaround:
None
System Number:
1410
Fix Plan:
Rev A
0K40A
CPM4
No CTS Lost Indication with HDLC
Date Added:
5/30/2000
Description:
When CTS is negated at the end of an HDLC frame, (last flag or one bit before)
transmission will be aborted. However, there is no CTS-LOST indication. There is only an abort
indication.
Workaround:
None
System Number:
1670
Fix Plan:
Rev A
0K40A
Table 2.
Silicon Errata (Continued)
Errata
Number
Errata Description
Applies
to Mask
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| MSC8101 | Network Digital Signal Processor |
| MSC8122_07 | Quad Digital Signal Processor |
| MSC8122 | Quad Core 16-Bit Digital Signal Processor |
| MSC8126 | Quad Digital Signal Processor |
| MSC8144EC | Quad Core Digital Signal Processor |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| MSC8101M1375C | 制造商:MOTOROLA 制造商全稱:Motorola, Inc 功能描述:Network Digital Signal Processor |
| MSC8101M1375F | 功能描述:DSP 16BIT 275MHZ CPM 332-FCPBGA RoHS:否 類別:集成電路 (IC) >> 嵌入式 - DSP（數(shù)字式信號處理器） 系列:StarCore 標(biāo)準(zhǔn)包裝:40 系列:TMS320DM64x, DaVinci™ 類型:定點(diǎn) 接口:I²C，McASP，McBSP 時(shí)鐘速率:400MHz 非易失內(nèi)存:外部 芯片上RAM:160kB 電壓 - 輸入/輸出:3.30V 電壓 - 核心:1.20V 工作溫度:0°C ~ 90°C 安裝類型:表面貼裝 封裝/外殼:548-BBGA，F(xiàn)CBGA 供應(yīng)商設(shè)備封裝:548-FCBGA（27x27） 包裝:托盤 配用:TMDSDMK642-0E-ND - DEVELPER KIT W/NTSC CAMERA296-23038-ND - DSP STARTER KIT FOR TMS320C6416296-23059-ND - FLASHBURN PORTING KIT296-23058-ND - EVAL MODULE FOR DM642TMDSDMK642-ND - DEVELOPER KIT W/NTSC CAMERA |
| MSC8101M1500F | 功能描述:DSP 16BIT 300MHZ CPM 332-FCPBGA RoHS:否 類別:集成電路 (IC) >> 嵌入式 - DSP（數(shù)字式信號處理器） 系列:StarCore 標(biāo)準(zhǔn)包裝:40 系列:TMS320DM64x, DaVinci™ 類型:定點(diǎn) 接口:I²C，McASP，McBSP 時(shí)鐘速率:400MHz 非易失內(nèi)存:外部 芯片上RAM:160kB 電壓 - 輸入/輸出:3.30V 電壓 - 核心:1.20V 工作溫度:0°C ~ 90°C 安裝類型:表面貼裝 封裝/外殼:548-BBGA，F(xiàn)CBGA 供應(yīng)商設(shè)備封裝:548-FCBGA（27x27） 包裝:托盤 配用:TMDSDMK642-0E-ND - DEVELPER KIT W/NTSC CAMERA296-23038-ND - DSP STARTER KIT FOR TMS320C6416296-23059-ND - FLASHBURN PORTING KIT296-23058-ND - EVAL MODULE FOR DM642TMDSDMK642-ND - DEVELOPER KIT W/NTSC CAMERA |
| MSC8101UG/D | 制造商:FREESCALE 制造商全稱:Freescale Semiconductor, Inc 功能描述:Network Digital Signal Processor |
| MSC8101VT1250F | 功能描述:IC DSP 16BIT 250MHZ 332-FCPBGA RoHS:是 類別:集成電路 (IC) >> 嵌入式 - DSP（數(shù)字式信號處理器） 系列:StarCore 標(biāo)準(zhǔn)包裝:2 系列:StarCore 類型:SC140 內(nèi)核 接口:DSI，以太網(wǎng)，RS-232 時(shí)鐘速率:400MHz 非易失內(nèi)存:外部 芯片上RAM:1.436MB 電壓 - 輸入/輸出:3.30V 電壓 - 核心:1.20V 工作溫度:-40°C ~ 105°C 安裝類型:表面貼裝 封裝/外殼:431-BFBGA，F(xiàn)CBGA 供應(yīng)商設(shè)備封裝:431-FCPBGA（20x20） 包裝:托盤 |
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