參數(shù)資料
型號: MSC8101M1250F
廠商: MOTOROLA INC
元件分類: 數(shù)字信號處理
英文描述: Network Digital Signal Processor
中文描述: 64-BIT, 62.5 MHz, OTHER DSP, PBGA332
封裝: 17 X 17 MM, LIDDED FLIP CHIP, PLASTIC, BGA-332
文件頁數(shù): 12/28頁
文件大?。?/td> 378K
代理商: MSC8101M1250F
Silicon Errata for the MSC8101 Processor, Mask 0K40A, Rev. 5
12
Freescale Semiconductor
CPM10
Error in ATM Underrun Report
Date Added:
5/30/2000
Description:
In ATM, a Transmit internal rate underrun error is not reported correctly in the
TIRU field of the FCCE register. In most cases, TIRU is not set in the FCCE when an internal rate
underrun error occurs. In some rare cases that depend on internal sequences within the communi-
cations controller, the TIRU bit may be set as expected when the error should be reported.
Workaround:
None
System Number:
2611
Fix Plan:
Rev A
0K40A
CPM11
False Indication of Shared Flag
Date Added:
5/30/2000
Description:
FCC-TX HDLC - FCT_TXD (data out) changes from 1-->0 for 1 ser_clock period,
few clocks after the reset command from MAIN is given. A false shared flag can be detected at
the receiver if the last bit before reset was 0, and the receiver considers it as a closing flag of the
frame. In most of cases, a CRC error is generated and the frame is discarded.
Workaround:
None
System Number:
3024
Fix Plan:
Rev A
0K40A
CPM112
FCC Missing Reset at OverRun
Date Added:
12/19/2003
Description:
TxBD may not be closed for FCC in Half-duplex 10BaseT Ethernet. There may be
a mismatch between the actual transmitted BD and the BD for which status is updated. As a result,
the status of one to three BDs may not be updated, and they would appear "Ready", although the
associated frames have been transmitted (assuming a frame per BD).
Workaround:
Use microcode patch provided by Freescale.
System Number:
11064, 11067
Fix Plan:
N/A
0K40A
CPM13
Error in Random Number Generation
Date Added:
5/30/2000
Description:
In Fast Ethernet transmit, when more then one (up to four) frames reside in the FCC
FIFO, random number generation (for collision wait) may produce the same number for all four
frames.
Workaround:
None
System Number:
3421
Fix Plan:
Rev A
0K40A
CPM14
Corruption of ATM Cells
Date Added:
5/30/2000
Description:
Corruption of ATM cells may occur when the following combination is used:
AAL1 with UDC in which the user-defined header size is 9 to 12 octets and PM is not used.
Workaround:
Since this problem appears in a very specific condition as described above, avoid-
ing any of the elements (e.g., using cell header of 8 octets) eliminates it.
System Number:
3488
Fix Plan:
Rev A
0K40A
Table 2.
Silicon Errata (Continued)
Errata
Number
Errata Description
Applies
to Mask
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