參數(shù)資料
型號(hào)： MPE603ERX100LX
廠商： FREESCALE SEMICONDUCTOR INC
元件分類： 微控制器/微處理器
英文描述： 32-BIT, 100 MHz, RISC PROCESSOR, CBGA255
封裝： 21 X 21 MM, 3 MM HEIGHT, 1.27 MM PITCH, CERAMIC, BGA-255
文件頁(yè)數(shù)： 4/32頁(yè)
文件大?。?/td> 250K
代理商： MPE603ERX100LX
12
PID6-603e Hardware Specifications, Rev 2
Figure 5 provides the JTAG clock input timing diagram.
Figure 5. JTAG Clock Input Timing Diagram
Figure 6 provides the TRST timing diagram.
Figure 6. TRST Timing Diagram
10
TMS, TDI data setup time
0
—
ns
11
TMS, TDI data hold time
25
—
ns
12
TCK to TDO data valid
4
24
ns
13
TCK to TDO high impedance
3
15
ns
Notes:
1. TRST is an asynchronous signal. The setup time is for test purposes only.
2. Non-test signal input timing with respect to TCK.
3. Non-test signal output timing with respect to TCK.
Table 9. JTAG AC Timing Specifications (Independent of SYSCLK) (Continued)
At recommended operating conditions. See Table 2. CL = 50 pF
Num
Characteristic
Min
Max
Unit
Notes
TCK
2
1
VM
3
VM = Midpoint Voltage (1.4 V)
4
5
TRST
TCK
VM
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Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com
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