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μ
PD705101
35
Instruction
Operand(s)
Format
CY
OV
S
Z
Function
AND
reg1, reg2
I
–
0
AND. reg2 and reg1 are ANDed and the result
is written into reg2.
ANDI
imm16,
reg1, reg2
V
–
0
0
AND. reg1 is ANDed with imm16,
zero-extended to a word, and result is written
into reg2.
BC
disp9
III
–
–
–
–
Conditional branch (if Carry) relative to PC.
BDLD
[reg1], [reg2]
VII
–
–
–
–
Block transfer. 4 words of data are transferred
from external memory to built-in data RAM.
BDST
[reg2], [reg1]
VII
–
–
–
–
Block transfer. 4 words of data are transferred
from built-in data RAM to external memory.
BE
disp9
III
–
–
–
–
Conditional branch (if Equal) relative to PC.
BGE
disp9
III
–
–
–
–
Conditional branch (if Greater than or Equal)
relative to PC.
BGT
disp9
III
–
–
–
–
Conditional branch (if Greater than) relative to
PC.
BH
disp9
III
–
–
–
–
Conditional branch (if Higher) relative to PC.
BILD
[reg1], [reg2]
VII
–
–
–
–
Block transfer. 4 words of data are transferred
from external memory to built-in instruction RAM.
BIST
[reg2], [reg1]
VII
–
–
–
–
Block transfer. 4 words of data are transferred
from built-in instruction RAM to external memory.
BL
disp9
III
–
–
–
–
Conditional branch (if Lower) relative to PC.
BLE
disp9
III
–
–
–
–
Conditional branch (if Less than or Equal)
relative to PC.
BLT
disp9
III
–
–
–
–
Conditional branch (if Less than) relative to PC.
BN
disp9
III
–
–
–
–
Conditional branch (if Negative) relative to PC.
BNC
disp9
III
–
–
–
–
Conditional branch (if Not Carry) relative to PC.
BNE
disp9
III
–
–
–
–
Conditional branch (if Not Equal) relative to PC.
BNH
disp9
III
–
–
–
–
Conditional branch (if Not Higher) relative to PC.
BNL
disp9
III
–
–
–
–
Conditional branch (if Not Lower) relative to PC.
BNV
disp9
III
–
–
–
–
Conditional branch (if Not Overflow) relative to
PC.
BNZ
disp9
III
–
–
–
–
Conditional branch (if Not Zero) relative to PC.
BP
disp9
III
–
–
–
–
Conditional branch (if Positive) relative to PC.
BR
disp9
III
–
–
–
–
Unconditional branch (Always) relative to PC.
BRKRET
IX
–
–
–
–
Return from fatal exception handling.
BV
disp9
III
–
–
–
–
Conditional branch (if Overflow) relative to PC.
BZ
disp9
III
–
–
–
–
Conditional branch (if Zero) relative to PC.
CAXI
disp16[reg1],
reg2
VI
Inter-processor synchronization in multi-
processor system.