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參數(shù)資料
| 型號： | MPC8321EVRADDC |
| 廠商： | FREESCALE SEMICONDUCTOR INC |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 32-BIT, 266 MHz, RISC PROCESSOR, PBGA516 |
| 封裝： | 27 X 27 MM, 2.25 MM HEIGHT, 1 MM PITCH, LEAD FREE, PLASTIC, PBGA-516 |
| 文件頁數(shù)： | 61/80頁 |
| 文件大?。?/td> | 1122K |
| 代理商： | MPC8321EVRADDC |
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MPC8323E PowerQUICC II Pro Integrated Communications Processor Family Hardware Specifications, Rev. 2
64
Freescale Semiconductor
Clocking
See the “QUICC Engine PLL Multiplication Factor” section and the “QUICC Engine PLL Division
Factor” section in the MPC8323E PowerQUICC II Pro Communications Processor Reference Manual
for more information.
The DDR SDRAM memory controller will operate with a frequency equal to twice the frequency of
csb_clk. Note that ddr_clk is not the external memory bus frequency; ddr_clk passes through the DDR
clock divider (
÷2) to create the differential DDR memory bus clock outputs (MCK and MCK). However,
the data rate is the same frequency as ddr_clk.
The local bus memory controller will operate with a frequency equal to the frequency of csb_clk. Note that
lbc_clk is not the external local bus frequency; lbc_clk passes through the LBC clock divider to create the
external local bus clock outputs (LSYNC_OUT and LCLK[0:2]). The LBC clock divider ratio is
controlled by LCCR[CLKDIV]. See the “LBC Bus Clock and Clock Ratios” section in the MPC8323E
PowerQUICC II Pro Communications Processor Reference Manual for more information.
In addition, some of the internal units may be required to be shut off or operate at lower frequency than
the csb_clk frequency. These units have a default clock ratio that can be configured by a memory mapped
register after the device comes out of reset. Table 56 specifies which units have a configurable clock
frequency. Refer to the “System Clock Control Register (SCCR)” section in the MPC8323E
PowerQUICC II Pro Communications Processor Reference Manual for a detailed description.
NOTE
Setting the clock ratio of these units must be performed prior to any access
to them.
Table 57 provides the operating frequencies for the 8323E PBGA under recommended operating
conditions (see Table 2).
Table 56. Configurable Clock Units
Unit
Default
Frequency
Options
Security core, I2C, SAP, TPR
csb_clk
Off,
csb_clk/2, csb_clk/3
PCI and DMA complex
csb_clk
Off,
csb_clk
Table 57. Operating Frequencies for PBGA
Characteristic1
1 The CLKIN frequency, RCWL[SPMF], and RCWL[COREPLL] settings must be chosen such that the resulting csb_clk, MCLK,
LCLK[0:2], and
core_clk frequencies do not exceed their respective maximum or minimum operating frequencies.
Max Operating Frequency
Unit
e300 core frequency (
core_clk)333
MHz
Coherent system bus frequency (
csb_clk)133
MHz
QUICC Engine frequency (
ce_clk)200
MHz
DDR1/DDR2 memory bus frequency (MCLK)2
2 The DDR1/DDR2 data rate is 2x the DDR1/DDR2 memory bus frequency.
133
MHz
Local bus frequency (LCLK
n)3
3 The local bus frequency is 1/2, 1/4, or 1/8 of the lb_clk frequency (depending on LCCR[CLKDIV]) which is in turn 1x or 2x the
csb_clk frequency (depending on RCWL[LBCM]).
66
MHz
PCI input frequency (CLKIN or PCI_CLK)
66
MHz
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| MPC8321EVRAFDC | 功能描述:微處理器 - MPU 8321 NOPB PBGA W/ ENCR RoHS:否 制造商:Atmel 處理器系列:SAMA5D31 核心:ARM Cortex A5 數(shù)據(jù)總線寬度:32 bit 最大時鐘頻率:536 MHz 程序存儲器大小:32 KB 數(shù)據(jù) RAM 大小:128 KB 接口類型:CAN, Ethernet, LIN, SPI,TWI, UART, USB 工作電源電壓:1.8 V to 3.3 V 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:FBGA-324 |
| MPC8321EVRAFDC | 制造商:Freescale Semiconductor 功能描述:Embedded Networking Processor |
| MPC8321EVRAFDCA | 制造商:Freescale Semiconductor 功能描述:POWERQUICC, 32 BIT POWER ARCHITECTURE SOC, 333MHZ E300, QE, - Trays 制造商:Freescale Semiconductor 功能描述:IC MPU PWRQUICC 333MHZ 516BGA 制造商:Freescale Semiconductor 功能描述:MPC8321 Series 32 Bit 333 MHz PowerQUICC II Integrated Communication Processor 制造商:Freescale Semiconductor 功能描述:PowerQUICC, 32 Bit Power Architecture SoC, 333MHz e300, QE, PCI, USB2.0, DDR1/2, |
| MPC8321EZQADDC | 功能描述:微處理器 - MPU 8321 PBGA W/ ENCR RoHS:否 制造商:Atmel 處理器系列:SAMA5D31 核心:ARM Cortex A5 數(shù)據(jù)總線寬度:32 bit 最大時鐘頻率:536 MHz 程序存儲器大小:32 KB 數(shù)據(jù) RAM 大小:128 KB 接口類型:CAN, Ethernet, LIN, SPI,TWI, UART, USB 工作電源電壓:1.8 V to 3.3 V 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:FBGA-324 |
| MPC8321EZQAFDC | 功能描述:微處理器 - MPU 8321 PBGA W/ ENCR RoHS:否 制造商:Atmel 處理器系列:SAMA5D31 核心:ARM Cortex A5 數(shù)據(jù)總線寬度:32 bit 最大時鐘頻率:536 MHz 程序存儲器大小:32 KB 數(shù)據(jù) RAM 大小:128 KB 接口類型:CAN, Ethernet, LIN, SPI,TWI, UART, USB 工作電源電壓:1.8 V to 3.3 V 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:FBGA-324 |
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