參數(shù)資料
型號: MPC8321EVRADDC
廠商: FREESCALE SEMICONDUCTOR INC
元件分類: 微控制器/微處理器
英文描述: 32-BIT, 266 MHz, RISC PROCESSOR, PBGA516
封裝: 27 X 27 MM, 2.25 MM HEIGHT, 1 MM PITCH, LEAD FREE, PLASTIC, PBGA-516
文件頁數(shù): 59/80頁
文件大?。?/td> 1122K
代理商: MPC8321EVRADDC
MPC8323E PowerQUICC II Pro Integrated Communications Processor Family Hardware Specifications, Rev. 2
62
Freescale Semiconductor
Clocking
22 Clocking
Figure 42 shows the internal distribution of clocks within the MPC8323E.
Figure 42. MPC8323E Clock Subsystem
The primary clock source for the MPC8323E can be one of two inputs, CLKIN or PCI_CLK, depending
on whether the device is configured in PCI host or PCI agent mode, respectively.
22.1
Clocking in PCI Host Mode
When the MPC8323E is configured as a PCI host device (RCWH[PCIHOST] = 1), CLKIN is its primary
input clock. CLKIN feeds the PCI clock divider (
÷2) and the PCI_SYNC_OUT and PCI_CLK_OUT
Core PLL
System
LBC
LCLK[0:1]
core_clk
e300c2 core
csb_clk to Rest
CLKIN
csb_clk
MPC8323E
Local Bus
PCI_CLK_OUT[0:2]
PCI_SYNC_OUT
PCI_CLK/
Clock
Unit
of the Device
lb_clk
PCI Clock
PCI_SYNC_IN
Memory
Device
/n
To Local Bus
Clock
Divider (
÷2)
MEMC1_MCK
2
DDR
ddr_clk
DDR
Memory
Device
PLL
QUICC
PLL
ce_clk to
To DDR
Memory
Controller
Clock
CFG_CLKIN_DIV
/2
Divider
2
3
Engine
QUICC Engine
Block
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