參數(shù)資料
型號(hào): MPC8321EVRADDC
廠商: FREESCALE SEMICONDUCTOR INC
元件分類: 微控制器/微處理器
英文描述: 32-BIT, 266 MHz, RISC PROCESSOR, PBGA516
封裝: 27 X 27 MM, 2.25 MM HEIGHT, 1 MM PITCH, LEAD FREE, PLASTIC, PBGA-516
文件頁數(shù): 33/80頁
文件大?。?/td> 1122K
代理商: MPC8321EVRADDC
MPC8323E PowerQUICC II Pro Integrated Communications Processor Family Hardware Specifications, Rev. 2
Freescale Semiconductor
39
TDM/SI
Figure 30 and Figure 31 represent the AC timing from Table 45. Note that although the specifications
generally reference the rising edge of the clock, these AC timing diagrams also apply when the falling edge
is the active edge.
Figure 30 shows the SPI timing in slave mode (external clock).
Figure 30. SPI AC Timing in Slave Mode (External Clock) Diagram
Figure 31 shows the SPI timing in master mode (internal clock).
Figure 31. SPI AC Timing in Master Mode (Internal Clock) Diagram
17 TDM/SI
This section describes the DC and AC electrical specifications for the time-division-multiplexed and serial
interface of the MPC8323E.
17.1
TDM/SI DC Electrical Characteristics
Table 46 provides the DC electrical characteristics for the MPC8323E TDM/SI.
Table 46. TDM/SI DC Electrical Characteristics
Characteristic
Symbol
Condition
Min
Max
Unit
Output high voltage
VOH
IOH = –2.0 mA
2.4
V
Output low voltage
VOL
IOL = 3.2 mA
0.5
V
Input high voltage
VIH
—2.0
OVDD +0.3
V
SPICLK (Input)
tNEIXKH
tNEIVKH
tNEKHOV
Input Signals:
SPIMOSI
(See Note)
Output Signals:
SPIMISO
(See Note)
Note: The clock edge is selectable on SPI.
SPICLK (Output)
tNIIXKH
tNIKHOV
Input Signals:
SPIMISO
(See Note)
Output Signals:
SPIMOSI
(See Note)
Note: The clock edge is selectable on SPI.
tNIIVKH
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