參數(shù)資料
型號: MPC8308ZQAGD
廠商: Freescale Semiconductor
文件頁數(shù): 81/83頁
文件大?。?/td> 0K
描述: MPU POWERQUICC II PRO 473MAPBGA
標(biāo)準(zhǔn)包裝: 84
系列: MPC83xx
處理器類型: 32-位 MPC83xx PowerQUICC II Pro
速度: 400MHz
電壓: 1V
安裝類型: 表面貼裝
封裝/外殼: 473-LFBGA
供應(yīng)商設(shè)備封裝: 473-MAPBGA(19x19)
包裝: 托盤
MPC8308 PowerQUICC II Pro Processor Hardware Specification, Rev. 3
82
Freescale Semiconductor
Document Revision History
25 Document Revision History
This table summarizes a revision history for this document.
Table 63. Document Revision History
Rev.
Number
Date
Substantive Change(s)
3
10/2011
In Section 2.1.4, “Power Sequencing,changed description.
In Table 53, updated GPIOs pins as I/O.
In Table 54, removed PCI Express = csb_clk/2 and csb_clk/3 options.
In Table 61, added note 4.
2
02/2011
Added NVDDJ to Note-7 in Table 1.
Added Note-2
Added NVDDJ to Note-3
Added “Extended Temperature range from -40 to 105
C, in the last row of the table
Changed “characteristic name Junction temperature” to “Operating temperature range”
In Table 4, Note-3, changed ambient temperature to junction temperature, TJ = 105 C
tDDKHCS changed from 3.15ns to 2.5ns
tDDKHMP and tDDKHME values updated
In Figure 6, corrected tDDKHMP & tDDKHME waveform
Y23 Package Pin Number changed from NC to VDD signal group
TSEC2_CRS is muxed with GPIO[0], shown as TSEC2_CRS/ GPIO[0]
In Table 58, note-1, core_clk maximum operating frequency 333 MHz replaced with 400 MHz
1
06/2010
In Table 4, TA = 105 replaced with TJ = 105
In Table 8, fSYS_CLK_IN (Max) = 66 replaced with 66.67 and tSYS_CLK_IN (Min) = 15.15 replaced with 15
In Table 53, TSEC1_TMR_RX_ESFD replaced with TSEC2_TMR_RX_ESFD
TSEC1_TMR_TX_ESFD replaced with TSEC2_TMR_TX_ESFD
TSEC0_TMR_RX_ESFD replaced with TSEC1_TMR_RX_ESFD
TSEC0_TMR_TX_ESFD replaced with TSEC1_TMR_TX_ESFD
In Table 56, rows from 1000 to 1111 removed
In Table 57, SPMF 5:1 Option 167 MHz added.
0
05/2010
Initial release
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