參數資料
型號: MPC8308ZQAGD
廠商: Freescale Semiconductor
文件頁數: 39/83頁
文件大?。?/td> 0K
描述: MPU POWERQUICC II PRO 473MAPBGA
標準包裝: 84
系列: MPC83xx
處理器類型: 32-位 MPC83xx PowerQUICC II Pro
速度: 400MHz
電壓: 1V
安裝類型: 表面貼裝
封裝/外殼: 473-LFBGA
供應商設備封裝: 473-MAPBGA(19x19)
包裝: 托盤
MPC8308 PowerQUICC II Pro Processor Hardware Specification, Rev. 3
44
Freescale Semiconductor
Enhanced Secure Digital Host Controller (eSDHC)
Figure 33. Local Bus Signals, GPCM/UPM Signals for LCCR[CLKDIV] = 4
13 Enhanced Secure Digital Host Controller (eSDHC)
This section describes the DC and AC electrical specifications for the eSDHC (SD/MMC/SDIO) interface
of the MPC8308.
The eSDHC controller always uses the falling edge of the SD_CLK in order to drive the
SD_DAT[0:3]/CMD as outputs and rising edge to sample the SD_DAT[0:3], CMD, CD and WP as inputs.
This behavior is true for both full and high speed modes.
13.1
eSDHC DC Electrical Characteristics
This table provides the DC electrical characteristics for the eSDHC (SD/MMC) interface of the device,
compatible with SDHC specifications. The eSDHC NVDD range is between 3.0 V and 3.6 V.
Table 38. eSDHC interface DC Electrical Characteristics
Characteristic
Symbol
Condition
Min
Max
Unit
Output high voltage
VOH
IOH = –8.0 mA
2.4
V
Output low voltage
VOL
IOL = 8.0 mA
0.5
V
LCLK
UPM Mode Input Signal:
LUPWAIT
tLBIXKH
tLBIVKH
tLBIXKH
tLBKHOZ
T1
T3
UPM Mode Output Signals:
LCS[0:3]/LBS[0:1]/LGPL[0:5]
GPCM Mode Output Signals:
LCS[0:3]/LWE
tLBKHOV
tLBKHOZ
T2
T4
Input Signals:
LD[0:15]
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