The I/O power supp" />
參數(shù)資料
型號: MPC8308ZQAGD
廠商: Freescale Semiconductor
文件頁數(shù): 56/83頁
文件大小: 0K
描述: MPU POWERQUICC II PRO 473MAPBGA
標(biāo)準(zhǔn)包裝: 84
系列: MPC83xx
處理器類型: 32-位 MPC83xx PowerQUICC II Pro
速度: 400MHz
電壓: 1V
安裝類型: 表面貼裝
封裝/外殼: 473-LFBGA
供應(yīng)商設(shè)備封裝: 473-MAPBGA(19x19)
包裝: 托盤
MPC8308 PowerQUICC II Pro Processor Hardware Specification, Rev. 3
6
Freescale Semiconductor
Power Characteristics
The I/O power supply ramp-up slew rate should be slower than 4V/100 s, this requirement is for ESD
circuit. Note that there is no specific power down sequence requirement for the device. I/O voltage
supplies (GVDD, LVDD, and NVDD) do not have any ordering requirements with respect to one another.
Figure 3. Power-Up Sequencing Example
3
Power Characteristics
The estimated typical power dissipation, not including I/O supply power for the device is shown in this
table. Table 5 shows the estimated typical I/O power dissipation.
Table 4. MPC8308 Power Dissipation1
1 The values do not include I/O supply power but do include core (V
DD) and PLL (AVDD1,
AVDD2, XCOREVDD, XPADVDD, and SDAVDD)
Core Frequency (MHz)
CSB Frequency (MHz)
Typical2
2 Typical power is based on best process, a voltage of V
DD = 1.0 V and ambient temperature
of TA = 25 C and an artificial smoker test.
Maximum 3
3 Maximum power is estimated based on best process, a voltage of V
DD = 1.05 V, a junction
temperature of TJ = 105 C
Unit
266
133
530
900
mW
333
133
565
950
mW
400
133
600
1000
mW
Note:
t
90%
V
Core Voltage (VDD)
I/O Voltage (GVDD, LVDD, and NVDD)
0
0.7 V
PORESET
>= 32
t
SYS_CLK_IN
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