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參數(shù)資料
| 型號(hào)： | MPC8308CZQAFD |
| 廠商： | Freescale Semiconductor |
| 文件頁(yè)數(shù)： | 68/83頁(yè) |
| 文件大?。?/td> | 0K |
| 描述： | MPU POWERQUICC II PRO 473MAPBGA |
| 標(biāo)準(zhǔn)包裝： | 84 |
| 系列： | MPC83xx |
| 處理器類型： | 32-位 MPC83xx PowerQUICC II Pro |
| 速度： | 333MHz |
| 電壓： | 1V |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 473-LFBGA |
| 供應(yīng)商設(shè)備封裝： | 473-MAPBGA（19x19） |
| 包裝： | 托盤 |
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MPC8308 PowerQUICC II Pro Processor Hardware Specification, Rev. 3
70
Freescale Semiconductor
Package and Pin Listings
VDD
Y23, H8, H9, H10, H14, H15, H16, J8, J16, K8, K16, L8, L16, M8,
M16, N8, N16, P8, P16, R8, R16, T8, T9, T10, T11, T12, T13, T14,
T15, T16
I—
—
VSS
A2, A21, B1, B19, B23, C4, C16, D6, D19, E3, F8, F15, F17, F23,
G7, G8, G10, G15, G16, G17, G20, H2, H6, H7, H17, H23, J7, J9,
J10, J11, J12, J13, J14, J15, K9, K10, K11, K12, K13, K14, K15,
L1, L7, L9, L10, L11, L12, L13, L14, L15, L20, M4, M9, M10, M11,
M12, M13, M14, M15, N9, N10, N11, N12, N13, N14, N15, P6, P7,
P9, P10, P11, P12, P13, P14, P15, R2, R7, R9, R10, R11, R12,
R13, R14, R15, R22, T6, T7, U8, U17, U21, V2, V7, V9, V11, W20,
Y8, Y15, AA4, AB1, AB6, AB12, AB19, AC2, AC9, AC23
I
—
NVDDA
B7, B10, C7, D9, F9
I
—
NVDDB
A16, A19, C18
I
—
NVDDC
A23, B22, D23, E20, G18
I
—
NVDDF
G22, J22, K17
I
—
NVDDG
M17, N22
I
—
NVDDH
P17, R20, T17, T23, W22, Y22
I
—
NVDDJ
AB23, AA22
I
—
NVDDP_K
U10, U14, Y5, Y18, AA11, AB8, AB16, AB22, AC4,
AC13
I
—
GVDD
A1, A6, B3, D1, F1, F6, G4, J1, J4, K7, N1, N7, T1, T4, U7, Y3, AC1
I
—
XPADVDD
D15, F10, F14
I
—
XPADVSS
A10, B15, D14, G13, G14, H12
I
—
XCOREVDD
A14, B12, C13
I
—
XCOREVSS
A12, B14, C11, D11, D13, G11, H11, H13
I
—
Notes:
1. This pin is an open drain signal. A weak pull-up resistor (1 k
) should be placed on this pin to NV
DD
2. This pin is an open drain signal. A weak pull-up resistor (2–10 k
) should be placed on this pin to NV
DD.
3. This output is actively driven during reset rather than being three-stated during reset.
4. This pin has weak internal pull-up that is always enabled. 5. This pin must always be tied to VSS.
6. Internal thermally sensitive resistor, resistor value varies linearly with temperature. Useful for determining the junction
temperature.
7. The LB_POR_CFG_BOOT_ECC is sampled only during the PORESET negation. This pin with an internal pull down resistor
enables the ECC by default. To disable the ECC an external strong pull up resistor or a buffer released to high impedance is
needed.
8. This pin has weak internal pull-down that is always enabled
Table 53. MPC8308 Pinout Listing (continued)
Signal
Package Pin Number
Pin
Type
Power
Supply
Note
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