I2
參數(shù)資料
型號： MPC8308CZQAFD
廠商： Freescale Semiconductor
文件頁數(shù)： 50/83頁
文件大?。?/td> 0K
描述： MPU POWERQUICC II PRO 473MAPBGA
標(biāo)準(zhǔn)包裝： 84
系列： MPC83xx
處理器類型： 32-位 MPC83xx PowerQUICC II Pro
速度： 333MHz
電壓： 1V
安裝類型： 表面貼裝
封裝/外殼： 473-LFBGA
供應(yīng)商設(shè)備封裝： 473-MAPBGA（19x19）
包裝： 托盤
MPC8308 PowerQUICC II Pro Processor Hardware Specification, Rev. 3
54
Freescale Semiconductor
I2C
This figure provides the AC test load for the I2C.
Figure 45. I2C AC Test Load
This figure shows the AC timing diagram for the I2C bus.
Figure 46. I2C Bus AC Timing Diagram
Setup time for STOP condition
tI2PVKH
0.6
—
s
Bus free time between a STOP and START condition
tI2KHDX
1.3
—
s
Noise margin at the LOW level for each connected device (including hysteresis)
VNL
0.1
NV
DD
—V
Noise margin at the HIGH level for each connected device (including hysteresis)
VNH
0.2
NV
DD
—V
Notes:
1. The symbols used for timing specifications follow the pattern of t(first two letters of functional block)(signal)(state) (reference)(state) for
inputs and t(first two letters of functional block)(reference)(state)(signal)(state) for outputs. For example, tI2DVKH symbolizes I
2C timing (I2)
with respect to the time data input signals (D) reach the valid state (V) relative to the tI2C clock reference (K) going to the high
(H) state or setup time. Also, tI2SXKL symbolizes I
2C timing (I2) for the time that the data with respect to the start condition (S)
went invalid (X) relative to the tI2C clock reference (K) going to the low (L) state or hold time. Also, tI2PVKH symbolizes I
2C timing
(I2) for the time that the data with respect to the stop condition (P) reaching the valid state (V) relative to the tI2C clock reference
(K) going to the high (H) state or setup time. For rise and fall times, the latter convention is used with the appropriate letter: R
(rise) or F (fall).
2. The device provides a hold time of at least 300 ns for the SDA signal (referred to the VIHmin of the SCL signal) to bridge the
undefined region of the falling edge of SCL.
3. The maximum tI2DXKL has only to be met if the device does not stretch the LOW period (tI2CL) of the SCL signal.
4. CB = capacitance of one bus line in pF.
5. The device does not follow the I2C-BUS Specifications, Version 2.1, regarding the tI2CF AC parameter.
Table 44. I2C AC Electrical Specifications (continued)
All values refer to VIH (min) and VIL (max) levels (see Table 43).
Parameter
Symbol1
Min
Max
Unit
Output
Z0 = 50
NVDD/2
RL = 50
Sr
S
SDA
SCL
tI2CF
tI2SXKL
tI2CL
tI2CH
tI2DXKL
tI2DVKH
tI2SXKL
tI2SVKH
tI2KHKL
tI2PVKH
tI2CR
tI2CF
PS
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MPC8308CZQAFDA 功能描述:微處理器 - MPU E300 ext tmp Qual333 RoHS:否 制造商:Atmel 處理器系列:SAMA5D31 核心:ARM Cortex A5 數(shù)據(jù)總線寬度:32 bit 最大時鐘頻率:536 MHz 程序存儲器大小:32 KB 數(shù)據(jù) RAM 大小:128 KB 接口類型:CAN, Ethernet, LIN, SPI,TWI, UART, USB 工作電源電壓:1.8 V to 3.3 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:FBGA-324
MPC8308CZQAGD 功能描述:微處理器 - MPU E300 EXT TEMP PB 400 RoHS:否 制造商:Atmel 處理器系列:SAMA5D31 核心:ARM Cortex A5 數(shù)據(jù)總線寬度:32 bit 最大時鐘頻率:536 MHz 程序存儲器大小:32 KB 數(shù)據(jù) RAM 大小:128 KB 接口類型:CAN, Ethernet, LIN, SPI,TWI, UART, USB 工作電源電壓:1.8 V to 3.3 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:FBGA-324
MPC8308CZQAGDA 功能描述:微處理器 - MPU E300 EXT TEMP PB 400 RoHS:否 制造商:Atmel 處理器系列:SAMA5D31 核心:ARM Cortex A5 數(shù)據(jù)總線寬度:32 bit 最大時鐘頻率:536 MHz 程序存儲器大小:32 KB 數(shù)據(jù) RAM 大小:128 KB 接口類型:CAN, Ethernet, LIN, SPI,TWI, UART, USB 工作電源電壓:1.8 V to 3.3 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:FBGA-324
MPC8308-KIT 功能描述:開發(fā)板和工具包 - 其他處理器 For MPC8308 Ethernet USB I2C SPI RoHS:否 制造商:Freescale Semiconductor 產(chǎn)品:Development Systems 工具用于評估:P3041 核心:e500mc 接口類型:I2C, SPI, USB 工作電源電壓:
MPC8308-NSG 功能描述:開發(fā)板和工具包 - 其他處理器 MPC8308-NSG RoHS:否 制造商:Freescale Semiconductor 產(chǎn)品:Development Systems 工具用于評估:P3041 核心:e500mc 接口類型:I2C, SPI, USB 工作電源電壓:
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