參數(shù)資料
型號: MPC8240LZU250X
廠商: MOTOROLA INC
元件分類: 微控制器/微處理器
英文描述: 32-BIT, 250 MHz, RISC PROCESSOR, PBGA352
封裝: TBGA-352
文件頁數(shù): 34/52頁
文件大?。?/td> 542K
代理商: MPC8240LZU250X
4
MPC8240 (rev0.5) Hardware Specifications
PRELIMINARY—SUBJECT TO CHANGE WITHOUT NOTICE
Features
1.2 Features
Major features of the MPC8240 are as follows:
Peripheral logic
— Memory interface
– Programmable timing supporting either FPM DRAM, EDO DRAM or SDRAM
– High-bandwidth bus (32-/64-bit data bus) to DRAM
– Supports one to eight banks of 4-, 16-, 64- or 128-Mbit memory devices
– Supports 1-Mbyte to 1-Gbyte DRAM memory
– Contiguous memory mapping
– 16 Mbytes of ROM space
– 8-, 32-, or 64-bit ROM
– Supports bus-width writes to ash ROM or ash
– Write buffering for PCI and processor accesses
– Supports normal parity, read-modify-write (RMW), or ECC
– SDRAM data-path buffer
– Error injection/capture on data path
– Low voltage transistor-to-transistor logic (LVTTL)
– Port X: 8-, 32-, or 64-bit general-purpose I/O port using ROM controller interface with
address strobe
— 32-bit PCI interface operating up to 66 MHz
– PCI 2.1-compliant
– PCI 5.0-V tolerance
– Support for PCI locked accesses to memory
– Support for accesses to all PCI address spaces
– Selectable big- or little-endian operation
– Store gathering of processor-to-PCI write and PCI-to-memory write accesses
– Memory prefetching of PCI read accesses
– Selectable hardware-enforced coherency
– PCI bus arbitration unit (ve request/grant pairs)
— PCI agent mode capability
– Address translation unit
– Internal conguration registers accessible from PCI
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