參數(shù)資料
型號(hào): ML60852A
廠商: LAPIS SEMICONDUCTOR CO LTD
元件分類(lèi): 總線控制器
英文描述: UNIVERSAL SERIAL BUS CONTROLLER, PQFP44
封裝: PLASTIC, QFP-44
文件頁(yè)數(shù): 59/82頁(yè)
文件大?。?/td> 370K
代理商: ML60852A
FEDL60852A-03
1Semiconductor
ML60852A
61/81
EP0 Stage (D5, D4): These bits indicate the stage transition during control transfer.
The flowchart of the stage transition is shown below.
Condition 1:
Reception of a setup packet of control READ transfer or control WRITE transfer.
Condition 2:
Reception of a setup packet of control transfer without data.
Condition 3:
Reception of a token (IN/OUT) of a direction opposite to the data flow in the data
stage.
Default State
Hardware Reset
USB Bus Reset
Condition 2
Condition 1
Condition 3
Condition 1
Data State
Data Stage
Completed State
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