參數(shù)資料
型號(hào): ML60852A
廠商: LAPIS SEMICONDUCTOR CO LTD
元件分類: 總線控制器
英文描述: UNIVERSAL SERIAL BUS CONTROLLER, PQFP44
封裝: PLASTIC, QFP-44
文件頁(yè)數(shù): 39/82頁(yè)
文件大?。?/td> 370K
代理商: ML60852A
FEDL60852A-03
1Semiconductor
ML60852A
43/81
Device Address Register (DVCADR)
Address
0 x 20
Type
7-bit data
Access type
Read/Write
D7
D6
D5
D4
D3
D2
D1
D0
After a hardware reset
0
0000
00
After a bus reset
Definition
Device address (R/W)
The device address given by a SET_ADDRESS request from the host is written in this register by the local MCU.
Thereafter, the ML60852A judges the specified address in the token from the host, and this device will process only
the token packets sent to this device address.
Bit D7 is fixed at “0”, and even if a “1” is written, it will be ignored.
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