參數(shù)資料
型號(hào): MCZ33780EG
廠商: Freescale Semiconductor
文件頁(yè)數(shù): 23/37頁(yè)
文件大小: 0K
描述: IC MASTER DUAL DBUS DIFF 16-SOIC
標(biāo)準(zhǔn)包裝: 47
系列: *
應(yīng)用: *
接口: *
電源電壓: *
封裝/外殼: 16-SOIC(0.295",7.50mm 寬)
供應(yīng)商設(shè)備封裝: 16-SOIC W
包裝: 管件
安裝類型: 表面貼裝
產(chǎn)品目錄頁(yè)面: 808 (CN2011-ZH PDF)
Analog Integrated Circuit Device Data
Freescale Semiconductor
3
33780
PIN CONNECTIONS
PIN CONNECTIONS
Figure 3. 33780 Pin Connections
Table 1. 33780 Pin Definitions
A functional description of each pin can be found in the Functional Pin Descriptions section beginning on page 13.
Pin
Pin Name
Pin Function
Formal Name
Definition
1
RST
Reset
IC Reset
A low level on this pin returns all registers to a known state as indicated
in the section entitled Register and Bit Descriptions.
2
CS
Input
SPI Chip Select Input
When this signal is high, SPI signals are ignored. Asserting this pin low
starts an SPI transaction. The SPI transaction is signaled as completed
when this signal returns high.
3
INT
Output
Interrupt Output
This output will be asserted low when an enabled interrupt condition
occurs. It contains a pullup current source that will perform a pullup when
unasserted.
4
MOSI
Input
Master Out Slave In
SPI data into this IC. This data input is sampled on the positive edge of
SCLK.
5
SCLK
Input
Serial Data Clock
Clocks in/out the data to/from the SPI. MISO data changes on the
negative transition of the SCLK. MOSI is sampled on the positive edge of
the SCLK.
6
MISO
Output
Master In Slave Out
SPI data sent to the MCU by this device. This data output changes on the
negative edge of SCLK. When CS is high, this pin is high impedance.
7
CLK
Input
Clock Input
4.0 MHz clock input.
8
GND
Ground
Ground reference for analog and digital circuits.
9
VCC
Input
Logic Supply
Logic power source input.
10
GND
Ground
Power Ground
Bus 1 power return.
11
D1L
Output Driver
Low-Side Bus 1
Bus 1 low side.
12
D1H
Output Driver
High-Side Bus 1
Bus 1 high side.
13
VSUP
Output
Positive Supply for
Bus Output
This supply input is used to provide the positive level output of the bus.
14
D0H
Output Driver
High-Side Bus 0
Bus 0 high side.
15
D0L
Output Driver
Low-Side Bus 0
Bus 0 low side.
16
GND
Ground
Power Ground
Bus 0 power return.
RST
INT
MOSI
SCLK
MISO
CLK
GND
CS
GND
D0L
D0H
VSUP
D1H
D1L
GND
VCC
2
3
4
5
6
7
8
16
14
13
12
11
10
15
9
1
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MCZ33780EG 制造商:Freescale Semiconductor 功能描述:DUAL DBUS MASTER INTERFACE 16SOIC
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