參數(shù)資料
型號(hào)： MCP4725A1T-E/CH
元件分類： DAC
英文描述： SERIAL INPUT LOADING, 6 us SETTLING TIME, 12-BIT DAC, PDSO6
封裝： PLASTIC, SOT-23, 6 PIN
文件頁(yè)數(shù)： 9/50頁(yè)
文件大?。?/td> 1494K
代理商： MCP4725A1T-E/CH
2009 Microchip Technology Inc.
DS22039D-page 17
MCP4725
4.9
Offset Error Drift
Offset error drift is the variation in offset error due to a
change in ambient temperature. The offset error drift is
typically expressed in ppm/oC.
4.10
Settling Time
The Settling time is the time delay required for the DAC
output to settle to its new output value from the start of
code transition, within specified accuracy. In the
MCP4725, the settling time is a measure of the time
delay until the DAC output reaches its final value
(within 0.5 LSB) when the DAC code changes from
400h to C00h.
4.11
Major-Code Transition Glitch
Major-code transition glitch is the impulse energy
injected into the DAC analog output when the code in
the DAC register changes state. It is normally specified
as the area of the glitch in nV-Sec. and is measured
when the digital code is changed by 1 LSB at the major
carry transition (Example: 011...111 to 100... 000, or
100... 000 to 011 ... 111).
4.12
Digital Feedthrough
Digital feedthrough is the glitch that appears at the
analog output caused by coupling from the digital input
pins of the device. It is specified in nV-Sec. and is
measured with a full scale change on the digital input
pins (Example: 000... 000 to 111... 111, or 111... 111 to
000... 000). The digital feedthrough is measured when
the DAC is not being written to the register.
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