參數(shù)資料
型號: MCIMX27
廠商: 飛思卡爾半導(dǎo)體(中國)有限公司
英文描述: Multimedia Applications Processor(多媒體應(yīng)用處理器)
中文描述: 多媒體應(yīng)用處理器(多媒體應(yīng)用處理器)
文件頁數(shù): 2/118頁
文件大?。?/td> 1159K
代理商: MCIMX27
i.MX27 Data Sheet, Advance Information, Rev. 0.1
2
Preliminary—Subject to Change Without Notice
Freescale Semiconductor
Introduction
clock gating). With 90 nm technology and dual Vt, the i.MX27 device provides the optimal performance
vs. leakage current balance.
The performance of the i.MX27 processor is boosted by an on-chip cache system, and features peripheral
devices, such as an MPEG-4, H.263, an H.264 video codec (up to D1—720 x 486—@ 30 FPS), LCD,
eMMA_lt, and CMOS Sensor Interface controllers.
The i.MX27 processor supports connections to various types of external memories, such as 266-MHz
DDR, NAND Flash, NOR Flash, SDRAM, and SRAM. The i.MX27 device can be connected to a variety
of external devices using technology, such as high-speed USBOTG 2.0, the Advanced Technology
Attachment (ATA), Multimedia/Secure Data (MMC/SDIO), and CompactFlash.
1.1
Features
The i.MX27 processor is targeted for video and voice over-IP (V2IP) and smart remote controllers. It also
provides low-power solutions for any high-performance and demanding multimedia and graphics
applications.
The systems include the following features:
Multi-standard video codec
— MPEG-4 part-II simple profile encoding/decoding
— H.264/AVC baseline profile encoding/decoding
— H.263 P3 encoding/decoding
— Multi-party call: one stream encoding and two streams decoding simultaneously
— Multi-format: encodes MPEG-4 bitstream, and decodes H.264 bitstream simultaneously
— On-the-fly video processing that reduces system memory load (for example, the
power-efficient viewfinder application with no involvement of either the memory system or the
ARM CPU)
Advanced power management
— Dynamic process and temperature compensation
— Multiple clock and power domains
— Independent gating of power domains
Multiple communication and expansion ports
1.2
Block Diagram
Figure 1
shows the i.MX27 simplified interface block diagram.
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