參數(shù)資料
型號(hào)： MC7445ARX933LG
廠商： 飛思卡爾半導(dǎo)體(中國(guó))有限公司
英文描述： RISC Microprocessor Hardware Specifications
中文描述： RISC微處理器硬件規(guī)格
文件頁(yè)數(shù)： 53/64頁(yè)
文件大小： 1127K
代理商： MC7445ARX933LG
MPC7455 RISC Microprocessor Hardware Specifications, Rev. 4.1
Freescale Semiconductor
53
System Design Information
mutually exclusive and it is never necessary to populate both in a system. To preserve correct power-down operation,
QACK should be merged via logic so that it also can be driven by the PCI bridge.
Figure 26. JTAG Interface Connection
HRESET
HRESET
From Target
Board Sources
HRESET
13
SRESET
SRESET
SRESET
NC
NC
11
VDD_SENSE
6
5
1
15
2 k
10 k
10 k
10 k
OV
DD
OV
DD
OV
DD
OV
DD
CHKSTP_IN
CHKSTP_IN
8
TMS
TDO
TDI
TCK
TMS
TDO
TDI
TCK
9
1
3
4
TRST
7
16
2
10
12
(if any)
C
14
2
Key
QACK
OV
DD
OV
DD
10 k
OV
DD
TRST
10 k
OV
DD
10 k
10 k
QACK
QACK
CHKSTP_OUT
CHKSTP_OUT
3
13
9
5
1
6
10
2
15
11
7
16
12
8
4
KEY
COP Connector
Physical Pin Out
10 k
4
OV
DD
2 k
3
0
5
Notes:
1. RUN/STOP, normally found on pin 5 of the COP header, is not implemented on the MPC7455. Con
pin 5 of the COP header to OV
DD
with a 10-k
pull-up resistor.
2. Key location; pin 14 is not physically present on the COP header.
3. Component not populated. Populate only if debug tool does not drive QACK.
4. Populate only if debug tool uses an open-drain type output and does not actively de-assert QACK
5. If the JTAG interface is implemented, connect HRESET from the target source to TRST from the
header though an AND gate to TRST of the part. If the JTAG interface is not implemented, con
HRESET from the target source to TRST of the part through a 0-
isolation reisistor.
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