- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄359670 > MC7445ARX933LG (飛思卡爾半導(dǎo)體(中國)有限公司) RISC Microprocessor Hardware Specifications PDF資料下載
參數(shù)資料
| 型號： | MC7445ARX933LG |
| 廠商： | 飛思卡爾半導(dǎo)體(中國)有限公司 |
| 英文描述： | RISC Microprocessor Hardware Specifications |
| 中文描述： | RISC微處理器硬件規(guī)格 |
| 文件頁數(shù)： | 51/64頁 |
| 文件大?。?/td> | 1127K |
| 代理商： | MC7445ARX933LG |
第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁第16頁第17頁第18頁第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁第28頁第29頁第30頁第31頁第32頁第33頁第34頁第35頁第36頁第37頁第38頁第39頁第40頁第41頁第42頁第43頁第44頁第45頁第46頁第47頁第48頁第49頁第50頁當(dāng)前第51頁第52頁第53頁第54頁第55頁第56頁第57頁第58頁第59頁第60頁第61頁第62頁第63頁第64頁
MPC7455 RISC Microprocessor Hardware Specifications, Rev. 4.1
Freescale Semiconductor
51
System Design Information
Table 19
summarizes the signal impedance results. The impedance increases with junction temperature and is
relatively unaffected by bus voltage.
9.6 Pull-Up/Pull-Down Resistor Requirements
The MPC7455 requires high-resistive (weak: 4.7-k
) pull-up resistors on several control pins of the bus interface
to maintain the control signals in the negated state after they have been actively negated and released by the
MPC7455 or other bus masters. These pins are: TS, ARTRY, SHDO, and SHD1.
Some pins designated as being for factory test must be pulled up to OV
DD
or down to GND to ensure proper device
operation. For the MPC7445, 360 BGA, the pins that must be pulled up to OV
DD
are: LSSD_MODE and TEST[0:3];
the pins that must be pulled down to GND are: L1_TSTCLK and TEST[4]. For the MPC7455, 483 BGA, the pins
that must be pulled up to OV
DD
are: LSSD_MODE and TEST[0:5]; the pins that must be pulled down are:
L1_TSTCLK and TEST[6]. The CKSTP_IN signal should likewise, be pulled up through a pull-up resistor (weak
or stronger: 4.7–1 k
) to prevent erroneous assertions of this signal
In addition, the MPC7455 has one open-drain style output that requires a pull-up resistor (weak or stronger:
4.7–1 k
) if it is used by the system. This pin is CKSTP_OUT.
If pull-down resistors are used to configure BVSEL or L3VSEL, the resistors should be less than 250
(see
Table 16
). Because PLL_CFG[0:4] must remain stable during normal operation, strong pull-up and pull-down
resistors (1 k
or less) are recommended to configure these signals in order to protect against erroneous switching
due to ground bounce, power supply noise or noise coupling.
During inactive periods on the bus, the address and transfer attributes may not be driven by any master and may,
therefore, float in the high-impedance state for relatively long periods of time. Because the MPC7455 must
continually monitor these signals for snooping, this float condition may cause excessive power draw by the input
receivers on the MPC7455 or by other receivers in the system. These signals can be pulled up through weak (10-k
)
pull-up resistors by the system, address bus driven mode enabled (see the
MPC7450 RISC Microporcessor Family
Users’ Manual
for more information on this mode), or they may be otherwise driven by the system during inactive
periods of the bus to avoid this additional power draw. Preliminary studies have shown the additional power draw
by the MPC7455 input receivers to be negligible and, in any event, none of these measures are necessary for proper
device operation. The snooped address and transfer attribute inputs are: A[0:35], AP[0:4], TT[0:4], CI, WT, and
GBL.
If extended addressing is not used, A[0:3] are unused and must be pulled low to GND through weak pull-down
resistors. If the MPC7455 is in 60x bus mode, DTI[0:3] must be pulled low to GND through weak pull-down
resistors.
The data bus input receivers are normally turned off when no read operation is in progress and, therefore, do not
require pull-up resistors on the bus. Other data bus receivers in the system, however, may require pull-ups, or that
those signals be otherwise driven by the system during inactive periods by the system. The data bus signals are:
D[0:63] and DP[0:7].
Table 19. Impedance Characteristics
V
DD
= 1.5 V, OV
DD
= 1.8 V ± 5%, T
j
= 5°–85°C
Impedance
Processor Bus
L3 Bus
Unit
Z
0
Typical
33–42
34–42
Maximum
31–51
32–44
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| MC7445ARX867LF | RISC Microprocessor Hardware Specifications |
| MC9328MXL | i.MX Integrated Portable System Processor |
| MRF18030BLSR3 | RF Power Field Effect Transistors N-Channel Enhancement-Mode Lateral MOSFETs |
| MW6S004NT1_07 | RF Power Field Effect Transistor |
| MC9328MXLCVP15 | i.MX Integrated Portable System Processor |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| MC7447A | 制造商:FREESCALE 制造商全稱:Freescale Semiconductor, Inc 功能描述:PowerPC microprocessor |
| MC7447AHX1000LB | 功能描述:微處理器 - MPU APOLO7PM RV1.1 1.3V 105C RoHS:否 制造商:Atmel 處理器系列:SAMA5D31 核心:ARM Cortex A5 數(shù)據(jù)總線寬度:32 bit 最大時鐘頻率:536 MHz 程序存儲器大小:32 KB 數(shù)據(jù) RAM 大小:128 KB 接口類型:CAN, Ethernet, LIN, SPI,TWI, UART, USB 工作電源電壓:1.8 V to 3.3 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:FBGA-324 |
| MC7447AHX1000NB | 功能描述:微處理器 - MPU APOLO7PM RV1.1 1.1V 105C RoHS:否 制造商:Atmel 處理器系列:SAMA5D31 核心:ARM Cortex A5 數(shù)據(jù)總線寬度:32 bit 最大時鐘頻率:536 MHz 程序存儲器大小:32 KB 數(shù)據(jù) RAM 大小:128 KB 接口類型:CAN, Ethernet, LIN, SPI,TWI, UART, USB 工作電源電壓:1.8 V to 3.3 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:FBGA-324 |
| MC7447AHX1000NBR | 制造商:Freescale Semiconductor 功能描述:MPU MPC74XX RISC 32BIT 0.13UM 1GHZ 1.8V/2.5V 360FCCBGA - Tape and Reel |
| MC7447AHX1000PC | 制造商:Freescale Semiconductor 功能描述:MPU MPC74XX RISC 32BIT 0.13UM 1GHZ 1.8V/2.5V 360FCCBGA - Bulk |
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。