參數(shù)資料
型號： MC68L11F1CFN3
廠商： FREESCALE SEMICONDUCTOR INC
元件分類： 微控制器/微處理器
英文描述： 8-BIT, EEPROM, MICROCONTROLLER, PQCC68
封裝： PLASTIC, LCC-68
文件頁數(shù)： 4/174頁
文件大?。?/td> 981K
代理商： MC68L11F1CFN3
MC68HC11F1
SERIAL PERIPHERAL INTERFACE
MOTOROLA
TECHNICAL DATA
8-3
Figure 8-2 SPI Transfer Format
8.2.1 Clock Phase and Polarity Controls
Software can select one of four combinations of serial clock phase and polarity using
two bits in the SPI control register (SPCR). The clock polarity is specified by the CPOL
control bit, which selects an active high or active low clock, and has no significant ef-
fect on the transfer format. The clock phase (CPHA) control bit selects one of two dif-
ferent transfer formats. The clock phase and polarity should be identical for the master
SPI device and the communicating slave device. In some cases, the phase and polar-
ity are changed between transfers to allow a master device to communicate with pe-
ripheral slaves having different requirements.
When CPHA equals zero, the SS line must be negated and reasserted between each
successive serial byte. Also, if the slave writes data to the SPI data register (SPDR)
while SS is low, a write collision error results.
When CPHA equals one, the SS line can remain low between successive transfers.
8.3 SPI Signals
The following paragraphs contain descriptions of the four SPI signals: master in slave
out (MISO), master out slave in (MOSI), serial clock (SCK), and slave select (SS).
Any SPI output line must have its corresponding data direction bit in DDRD register
set. If the DDR bit is clear, that line is disconnected from the SPI logic and becomes a
general-purpose input. All SPI input lines are forced to act as inputs regardless of the
state of the corresponding DDR bits in DDRD register.
2345678
1
SCK (CPOL = 1)
SCK (CPOL = 0)
SCK CYCLE #
SS (TO SLAVE)
654321
LSB
MSB
654321
LSB
SAMPLE INPUT
DATA OUT
SAMPLE INPUT
DATA OUT
(CPHA = 1)
(CPHA = 0)
SLAVE CPHA = 1 TRANSFER IN PROGRESS
MASTER TRANSFER IN PROGRESS
SLAVE CPHA = 0 TRANSFER IN PROGRESS
3
2
1
5
4
SS ASSERTED
MASTER WRITES
FIRST SCK EDGE
SPIF SET
SS NEGATED
1
2
3
4
5
TO SPDR
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
MC68L11F1CFNE3 功能描述:8位微控制器 -MCU 8B MCU 1KRAM 512BYTES RoHS:否 制造商:Silicon Labs 核心:8051 處理器系列:C8051F39x 數(shù)據(jù)總線寬度:8 bit 最大時鐘頻率:50 MHz 程序存儲器大小:16 KB 數(shù)據(jù) RAM 大小:1 KB 片上 ADC:Yes 工作電源電壓:1.8 V to 3.6 V 工作溫度范圍:- 40 C to + 105 C 封裝 / 箱體:QFN-20 安裝風(fēng)格:SMD/SMT
MC68L11K1FN2R2 制造商:Motorola Inc 功能描述:
MC68L11K1FUE2 功能描述:8位微控制器 -MCU 8B MCU L-VOLTAGE-EPP RoHS:否 制造商:Silicon Labs 核心:8051 處理器系列:C8051F39x 數(shù)據(jù)總線寬度:8 bit 最大時鐘頻率:50 MHz 程序存儲器大小:16 KB 數(shù)據(jù) RAM 大小:1 KB 片上 ADC:Yes 工作電源電壓:1.8 V to 3.6 V 工作溫度范圍:- 40 C to + 105 C 封裝 / 箱體:QFN-20 安裝風(fēng)格:SMD/SMT
MC68L711E9FN2 制造商:Rochester Electronics LLC 功能描述:- Bulk
MC68L711E9FNE2 功能描述:8位微控制器 -MCU 8B MCU LO VOLTAGE RoHS:否 制造商:Silicon Labs 核心:8051 處理器系列:C8051F39x 數(shù)據(jù)總線寬度:8 bit 最大時鐘頻率:50 MHz 程序存儲器大小:16 KB 數(shù)據(jù) RAM 大小:1 KB 片上 ADC:Yes 工作電源電壓:1.8 V to 3.6 V 工作溫度范圍:- 40 C to + 105 C 封裝 / 箱體:QFN-20 安裝風(fēng)格:SMD/SMT
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