參數(shù)資料
型號(hào)： MC68HC705L1B
廠商： MOTOROLA INC
元件分類(lèi)： 微控制器/微處理器
英文描述： 8-BIT, OTPROM, 2.1 MHz, MICROCONTROLLER, PDIP56
封裝： SDIP-56
文件頁(yè)數(shù)： 98/102頁(yè)
文件大?。?/td> 632K
代理商： MC68HC705L1B
MC68HC05L1
MOTOROLA
A-3
MC68HC705L1
A
A.3
Modes of Operation
The MC68HC705L1 also has two modes of operation – user mode and EPROM bootstrap mode.
Table A-1 shows the conditions required to enter each mode on the rising edge of RESET.
A.3.1
User Mode
The normal operating mode of the MC68HC705L1 is the user mode. The user mode will be
entered if the RESET line is brought low, and the IRQ pin is within its normal operational range
(VSS to VDD), the rising edge of the RESET will cause the MCU to enter the user mode.
Warning: In the MC68HC705L1, all vectors are fetched from EPROM in user mode; therefore,
the EPROM must be programmed (via the bootstrap mode) before the device is
powered up in user mode.
A.3.2
Bootstrap Mode
The bootstrap mode is provided in the MC68HC705L1 as a mean of self-programming its EPROM
with minimal circuitry. It is entered on the rising edge of RESET if IRQ pin is at 1.8VDD and TCAP1
is at logic one. RESET must be held low for 4064 cycles after POR (power-on reset).
A.4
EPROM Programming
The Program Control register (PCR) is provided for EPROM programming. The function of the
EPROM depends on the device operating mode. Figure A-2 shows the EPROM programming
circuit for MC68HC705L1.
Table A-1 MC68HC705L1 Operating Mode Entry Conditions
RESET
IRQ
TCAP1
MODE
VSS to VDD
USER
+9V Rising Edge*
VDD
BOOTSTRAP
* Minimum hold time should be 2 clock cycles, after that it can be used as a normal IRQ function pin.
5V
9V
TPG
93
相關(guān)PDF資料
PDF描述
MC68HC05L1FU 8-BIT, MROM, 2.1 MHz, MICROCONTROLLER, PQFP64
MC68HC05L1B 8-BIT, MROM, 2.1 MHz, MICROCONTROLLER, PDIP56
MC68HC705L2B 8-BIT, OTPROM, 2.1 MHz, MICROCONTROLLER, PDIP42
MC68HC705L2CB 8-BIT, OTPROM, 2.1 MHz, MICROCONTROLLER, PDIP42
MC68HC05L2CB 8-BIT, MROM, 2.1 MHz, MICROCONTROLLER, PDIP42
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
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